REG_WAIT 82 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c REG_WAIT(MP1_SMN_C2PMSG_91, CONTENT, 1, 10, 200000); REG_WAIT 129 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100); REG_WAIT 67 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c REG_WAIT(MP1_SMN_C2PMSG_91, CONTENT, 1, 10, 200000); REG_WAIT 66 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 80 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 195 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(BL_PWM_GRP1_REG_LOCK, REG_WAIT 219 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, REG_WAIT 247 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, REG_WAIT 320 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 125 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1, REG_WAIT 136 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0, REG_WAIT 200 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0, REG_WAIT 329 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1, REG_WAIT 81 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); REG_WAIT 105 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); REG_WAIT 129 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 223 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 300 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 332 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); REG_WAIT 354 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 367 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 389 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 405 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 453 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); REG_WAIT 466 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 476 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); REG_WAIT 494 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10); REG_WAIT 525 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 635 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT 682 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 700 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 743 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 752 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 766 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 775 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000); REG_WAIT 597 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_WAIT(DMIF_BUFFER_CONTROL, REG_WAIT 634 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_WAIT(DMIF_BUFFER_CONTROL, REG_WAIT 500 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_WAIT(FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, 1, 10, 10); REG_WAIT 91 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, REG_WAIT 735 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, REG_WAIT 954 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, REG_WAIT 201 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WAIT(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, 0, 1, 10); REG_WAIT 60 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_WAIT(DCHUBP_CNTL, REG_WAIT 514 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN1_PG_STATUS, REG_WAIT 522 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN3_PG_STATUS, REG_WAIT 530 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN5_PG_STATUS, REG_WAIT 538 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN7_PG_STATUS, REG_WAIT 566 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN0_PG_STATUS, REG_WAIT 574 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN2_PG_STATUS, REG_WAIT 582 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN4_PG_STATUS, REG_WAIT 590 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WAIT(DOMAIN6_PG_STATUS, REG_WAIT 101 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_WAIT(MPCC_STATUS[id], REG_WAIT 416 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OPTC_INPUT_CLOCK_CONTROL, REG_WAIT 424 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OTG_CLOCK_CONTROL, REG_WAIT 484 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OTG_CLOCK_CONTROL, REG_WAIT 604 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OTG_MASTER_UPDATE_LOCK, REG_WAIT 759 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OTG_STATUS, REG_WAIT 765 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WAIT(OTG_STATUS, REG_WAIT 80 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, REG_WAIT 645 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, REG_WAIT 770 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING, REG_WAIT 783 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, REG_WAIT 826 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE_PENDING, REG_WAIT 914 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, REG_WAIT 928 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_WAIT(DCHUBP_CNTL, REG_WAIT 271 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN16_PG_STATUS, REG_WAIT 279 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN17_PG_STATUS, REG_WAIT 287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN18_PG_STATUS, REG_WAIT 295 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN19_PG_STATUS, REG_WAIT 303 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN20_PG_STATUS, REG_WAIT 311 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN21_PG_STATUS, REG_WAIT 343 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN1_PG_STATUS, REG_WAIT 351 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN3_PG_STATUS, REG_WAIT 359 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN5_PG_STATUS, REG_WAIT 367 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN7_PG_STATUS, REG_WAIT 375 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN9_PG_STATUS, REG_WAIT 417 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN0_PG_STATUS, REG_WAIT 425 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN2_PG_STATUS, REG_WAIT 433 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN4_PG_STATUS, REG_WAIT 441 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN6_PG_STATUS, REG_WAIT 449 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WAIT(DOMAIN8_PG_STATUS, REG_WAIT 440 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c REG_WAIT(MPCC_STATUS[id], REG_WAIT 331 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_WAIT(OTG_MASTER_UPDATE_LOCK, REG_WAIT 237 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, REG_WAIT 497 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); REG_WAIT 106 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);