REG_UPDATE_2 73 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_UPDATE_2(MASTER_COMM_CMD_REG, REG_UPDATE_2 183 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_UPDATE_2(BL_PWM_GRP1_REG_LOCK, REG_UPDATE_2 281 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_UPDATE_2(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, REG_UPDATE_2 324 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_UPDATE_2(MASTER_COMM_CMD_REG, REG_UPDATE_2 818 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c REG_UPDATE_2(DCCG_AUDIO_DTO_SOURCE, REG_UPDATE_2 909 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c REG_UPDATE_2(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, REG_UPDATE_2 216 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_UPDATE_2(AUX_SW_CONTROL, REG_UPDATE_2 832 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c REG_UPDATE_2(PIXCLK_RESYNC_CNTL, REG_UPDATE_2 77 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 89 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 328 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 343 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 449 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 461 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL, REG_UPDATE_2 177 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], REG_UPDATE_2 187 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], REG_UPDATE_2 272 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c REG_UPDATE_2(DC_I2C_CONTROL, REG_UPDATE_2 365 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c REG_UPDATE_2(DC_I2C_CONTROL, REG_UPDATE_2 374 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c REG_UPDATE_2(DC_I2C_ARBITRATION, DC_I2C_SW_DONE_USING_I2C_REG, 1, REG_UPDATE_2 302 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, REG_UPDATE_2 322 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, REG_UPDATE_2 543 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_SEC_CNTL1, REG_UPDATE_2 1258 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_MSE_SAT0, REG_UPDATE_2 1272 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_MSE_SAT0, REG_UPDATE_2 1286 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_MSE_SAT1, REG_UPDATE_2 1300 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_UPDATE_2(DP_MSE_SAT1, REG_UPDATE_2 158 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DVMM_PTE_ARB_CONTROL, REG_UPDATE_2 238 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL2, REG_UPDATE_2 242 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL, REG_UPDATE_2 279 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL, REG_UPDATE_2 308 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL, REG_UPDATE_2 341 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL, REG_UPDATE_2 493 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(GRPH_CONTROL, REG_UPDATE_2 190 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 194 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 200 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 274 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL, REG_UPDATE_2 393 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 398 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 459 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 470 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 475 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 480 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_UPDATE_2( REG_UPDATE_2 136 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(AFMT_VBI_PACKET_CONTROL, REG_UPDATE_2 452 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2( REG_UPDATE_2 594 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 598 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 605 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 609 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 615 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 629 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 641 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 767 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, REG_UPDATE_2 775 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, REG_UPDATE_2 1370 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_AUDIO_PACKET_CONTROL, REG_UPDATE_2 1378 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, REG_UPDATE_2 1424 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(AFMT_60958_0, REG_UPDATE_2 1465 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, REG_UPDATE_2 1507 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(DP_SEC_CNTL, REG_UPDATE_2 125 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_UPDATE_2(SCL_MODE, SCL_MODE, 0, SCL_PSCL_EN, 0); REG_UPDATE_2 788 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_UPDATE_2(LB_DATA_FORMAT, REG_UPDATE_2 1306 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_UPDATE_2(DCFE_MEM_PWR_CTRL, REG_UPDATE_2 1310 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_UPDATE_2(DCFE_MEM_LIGHT_SLEEP_CNTL, REG_UPDATE_2 204 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c REG_UPDATE_2(DCHUB_FB_LOCATION, REG_UPDATE_2 434 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c REG_UPDATE_2(CURSOR0_CONTROL, REG_UPDATE_2 511 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c REG_UPDATE_2(DPP_CONTROL, REG_UPDATE_2 102 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL, REG_UPDATE_2 144 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL, REG_UPDATE_2 267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL, REG_UPDATE_2 626 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_UPDATE_2(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, REG_UPDATE_2 46 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCHUBP_CNTL, REG_UPDATE_2 195 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_PITCH, REG_UPDATE_2 199 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_PITCH_C, REG_UPDATE_2 219 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 223 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 227 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(HUBPRET_CONTROL, REG_UPDATE_2 381 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONTROL, REG_UPDATE_2 1107 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_UPDATE_2(CURSOR_SIZE, REG_UPDATE_2 271 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, REG_UPDATE_2 291 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_DPHY_PRBS_CNTL, REG_UPDATE_2 531 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_SEC_CNTL1, REG_UPDATE_2 1225 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_MSE_SAT0, REG_UPDATE_2 1239 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_MSE_SAT0, REG_UPDATE_2 1253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_MSE_SAT1, REG_UPDATE_2 1267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_UPDATE_2(DP_MSE_SAT1, REG_UPDATE_2 79 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 83 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 90 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CONTROL, REG_UPDATE_2 194 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CLAMP_CNTL, REG_UPDATE_2 200 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CLAMP_CNTL, REG_UPDATE_2 205 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CLAMP_CNTL, REG_UPDATE_2 210 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CLAMP_CNTL, REG_UPDATE_2 216 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_CLAMP_CNTL, REG_UPDATE_2 236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 248 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 258 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL, REG_UPDATE_2 176 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_H_SYNC_A, REG_UPDATE_2 190 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_H_BLANK_START_END, REG_UPDATE_2 217 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_V_SYNC_A, REG_UPDATE_2 231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_V_BLANK_START_END, REG_UPDATE_2 265 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CONTROL, REG_UPDATE_2 332 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(CONTROL, REG_UPDATE_2 355 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_BLANK_CONTROL, REG_UPDATE_2 378 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_BLANK_CONTROL, REG_UPDATE_2 412 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL, REG_UPDATE_2 421 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CLOCK_CONTROL, REG_UPDATE_2 428 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CLOCK_CONTROL, REG_UPDATE_2 432 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL, REG_UPDATE_2 461 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CONTROL, REG_UPDATE_2 476 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CONTROL, REG_UPDATE_2 858 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_V_TOTAL_CONTROL, REG_UPDATE_2 955 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_TEST_PATTERN_PARAMETERS, REG_UPDATE_2 1200 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_3D_STRUCTURE_CONTROL, REG_UPDATE_2 1424 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CRC0_WINDOWA_X_CONTROL, REG_UPDATE_2 1429 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CRC0_WINDOWA_Y_CONTROL, REG_UPDATE_2 1434 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CRC0_WINDOWB_X_CONTROL, REG_UPDATE_2 1439 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_UPDATE_2(OTG_CRC0_WINDOWB_Y_CONTROL, REG_UPDATE_2 346 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(DP_PIXEL_FORMAT, REG_UPDATE_2 530 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 534 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 541 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 545 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 551 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 564 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 576 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, REG_UPDATE_2 968 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(DP_VID_TIMING, REG_UPDATE_2 1313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, REG_UPDATE_2 1361 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(AFMT_60958_0, REG_UPDATE_2 1404 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2, REG_UPDATE_2 1446 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(DP_SEC_CNTL, REG_UPDATE_2 822 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c REG_UPDATE_2(CM_3DLUT_MODE, REG_UPDATE_2 834 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c REG_UPDATE_2(CM_3DLUT_READ_WRITE_CONTROL, REG_UPDATE_2 232 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c REG_UPDATE_2(DSCRM_DSC_FORWARD_CONFIG, REG_UPDATE_2 78 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE_2(CNV_SOURCE_SIZE, CNV_SOURCE_WIDTH, params->cnv_params.src_width, REG_UPDATE_2 256 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format, REG_UPDATE_2 59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCN_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, REG_UPDATE_2 357 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_PITCH, REG_UPDATE_2 362 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_PITCH_C, REG_UPDATE_2 382 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 386 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 390 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 394 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONFIG, REG_UPDATE_2 430 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(HUBPRET_CONTROL, REG_UPDATE_2 587 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(CURSOR_SIZE, REG_UPDATE_2 721 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCSURF_SURFACE_CONTROL, REG_UPDATE_2 914 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_UPDATE_2(DCHUBP_CNTL, REG_UPDATE_2 144 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.c REG_UPDATE_2(MCIF_WB_BUF_PITCH, MCIF_WB_BUF_LUMA_PITCH, params->luma_pitch >> 8, REG_UPDATE_2 116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c REG_UPDATE_2(DENORM_CONTROL[opp_id], REG_UPDATE_2 119 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c REG_UPDATE_2(DENORM_CLAMP_G_Y[opp_id], REG_UPDATE_2 122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c REG_UPDATE_2(DENORM_CLAMP_B_CB[opp_id], REG_UPDATE_2 253 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c REG_UPDATE_2(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], REG_UPDATE_2 207 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_UPDATE_2(DPG_CONTROL, REG_UPDATE_2 218 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_UPDATE_2(DPG_CONTROL, REG_UPDATE_2 229 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_UPDATE_2(DPG_CONTROL, REG_UPDATE_2 258 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_UPDATE_2(DPG_CONTROL, REG_UPDATE_2 63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_CONTROL, REG_UPDATE_2 356 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 1, REG_UPDATE_2 363 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL1, REG_UPDATE_2 374 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL1, REG_UPDATE_2 380 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 0, REG_UPDATE_2 80 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 87 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 94 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 108 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(HDMI_GENERIC_PACKET_CONTROL0, REG_UPDATE_2 283 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(DP_DSC_CNTL, REG_UPDATE_2 321 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(DP_MSA_VBID_MISC, REG_UPDATE_2 332 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(DP_SEC_CNTL, REG_UPDATE_2 381 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(DME_CONTROL, REG_UPDATE_2 490 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE_2(DP_VID_TIMING, REG_UPDATE_2 503 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c REG_UPDATE_2(DCHUBBUB_ARB_DF_REQ_OUTSTAND, REG_UPDATE_2 200 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c REG_UPDATE_2(ddc_setup, REG_UPDATE_2 85 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c REG_UPDATE_2(mux, REG_UPDATE_2 115 drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c REG_UPDATE_2(toggle_filt_cntl,