REG_SET_MASK      487 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, sg->thermtrip_threshold_mask, temp);
REG_SET_MASK      488 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, sg->thermtrip_enable_mask, 1);
REG_SET_MASK      489 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, sg->thermtrip_any_en_mask, 0);
REG_SET_MASK      544 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, sg->thermctl_lvl0_up_thresh_mask, temp);
REG_SET_MASK      545 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, sg->thermctl_lvl0_dn_thresh_mask, temp);
REG_SET_MASK      546 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt);
REG_SET_MASK      547 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt);
REG_SET_MASK      548 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1);
REG_SET_MASK      673 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, TH_INTR_UP_DN_EN);
REG_SET_MASK      685 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, 0);
REG_SET_MASK      698 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 0);
REG_SET_MASK      705 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, hi);
REG_SET_MASK      706 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, lo);
REG_SET_MASK      707 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1);
REG_SET_MASK      953 drivers/thermal/tegra/soctherm.c 		r = REG_SET_MASK(r, OC_INTR_OC1_MASK, 1);
REG_SET_MASK      956 drivers/thermal/tegra/soctherm.c 		r = REG_SET_MASK(r, OC_INTR_OC2_MASK, 1);
REG_SET_MASK      959 drivers/thermal/tegra/soctherm.c 		r = REG_SET_MASK(r, OC_INTR_OC3_MASK, 1);
REG_SET_MASK      962 drivers/thermal/tegra/soctherm.c 		r = REG_SET_MASK(r, OC_INTR_OC4_MASK, 1);
REG_SET_MASK     1788 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_DURATION_MASK, 0xff);
REG_SET_MASK     1789 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_STEP_MASK, 0xf);
REG_SET_MASK     1793 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_ENB_MASK, 1);
REG_SET_MASK     1794 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend);
REG_SET_MASK     1795 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff);
REG_SET_MASK     1832 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);
REG_SET_MASK     1833 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_CPU_MASK, throt_vect);
REG_SET_MASK     1834 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT2_CPU_MASK, throt_vect);
REG_SET_MASK     1838 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(0, THROT_PSKIP_RAMP_SEQ_BYPASS_MODE_MASK, 1);
REG_SET_MASK     1864 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);
REG_SET_MASK     1865 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend);
REG_SET_MASK     1866 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff);
REG_SET_MASK     1870 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_RAMP_DURATION_MASK, 0xff);
REG_SET_MASK     1871 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_RAMP_STEP_MASK, 0xf);
REG_SET_MASK     1892 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);
REG_SET_MASK     1893 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_GPU_MASK, throt_vect);
REG_SET_MASK     1906 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(0, OC1_CFG_HW_RESTORE_MASK, 1);
REG_SET_MASK     1907 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, OC1_CFG_THROTTLE_MODE_MASK, oc->mode);
REG_SET_MASK     1908 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, OC1_CFG_ALARM_POLARITY_MASK, oc->active_low);
REG_SET_MASK     1909 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(r, OC1_CFG_EN_THROTTLE_MASK, 1);
REG_SET_MASK     1946 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(0, THROT_PRIORITY_LITE_PRIO_MASK, stc.priority);
REG_SET_MASK     1949 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(0, THROT_DELAY_LITE_DELAY_MASK, 0);
REG_SET_MASK     1956 drivers/thermal/tegra/soctherm.c 	r = REG_SET_MASK(0, THROT_PRIORITY_LOCK_PRIORITY_MASK,
REG_SET_MASK     1978 drivers/thermal/tegra/soctherm.c 	v = REG_SET_MASK(0, THROT_GLOBAL_ENB_MASK, 1);
REG_SET_MASK     1983 drivers/thermal/tegra/soctherm.c 		v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1);
REG_SET_MASK     1989 drivers/thermal/tegra/soctherm.c 		v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1);
REG_SET_MASK     2065 drivers/thermal/tegra/soctherm.c 		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
REG_SET_MASK     2070 drivers/thermal/tegra/soctherm.c 		hotspot =  REG_SET_MASK(hotspot,