REG_MDP5_INTR_EN   20 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c 	mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_EN, irqmask);
REG_MDP5_INTR_EN   46 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c 	mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
REG_MDP5_INTR_EN   76 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c 	mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
REG_MDP5_INTR_EN   89 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c 	enable = mdp5_read(mdp5_kms, REG_MDP5_INTR_EN);