REG_GET_MASK      430 drivers/thermal/tegra/soctherm.c 	val = REG_GET_MASK(val, zone->sg->sensor_temp_mask);
REG_GET_MASK     1300 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG1_TEMP_ENABLE);
REG_GET_MASK     1310 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG1_TIDDQ_EN_MASK);
REG_GET_MASK     1312 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG1_TEN_COUNT_MASK);
REG_GET_MASK     1314 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG1_TSAMPLE_MASK);
REG_GET_MASK     1318 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_STATUS1_TEMP_VALID_MASK);
REG_GET_MASK     1320 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_STATUS1_TEMP_MASK);
REG_GET_MASK     1324 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_STATUS0_VALID_MASK);
REG_GET_MASK     1326 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_STATUS0_CAPTURE_MASK);
REG_GET_MASK     1330 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG0_STOP);
REG_GET_MASK     1332 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG0_TALL_MASK);
REG_GET_MASK     1334 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG0_TCALC_OVER);
REG_GET_MASK     1336 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG0_OVER);
REG_GET_MASK     1338 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG0_CPTR_OVER);
REG_GET_MASK     1342 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG2_THERMA_MASK);
REG_GET_MASK     1344 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, SENSOR_CONFIG2_THERMB_MASK);
REG_GET_MASK     1358 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, SENSOR_TEMP1_CPU_TEMP_MASK);
REG_GET_MASK     1360 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, SENSOR_TEMP1_GPU_TEMP_MASK);
REG_GET_MASK     1363 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, SENSOR_TEMP2_PLLX_TEMP_MASK);
REG_GET_MASK     1365 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, SENSOR_TEMP2_MEM_TEMP_MASK);
REG_GET_MASK     1378 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1384 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1390 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1394 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1406 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1418 drivers/thermal/tegra/soctherm.c 			state = REG_GET_MASK(r, mask);
REG_GET_MASK     1444 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, ttgs[0]->thermtrip_any_en_mask);
REG_GET_MASK     1447 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, ttgs[i]->thermtrip_enable_mask);
REG_GET_MASK     1449 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, ttgs[i]->thermtrip_threshold_mask);
REG_GET_MASK     1460 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, THROT_STATUS_BREACH_MASK);
REG_GET_MASK     1462 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, THROT_STATUS_STATE_MASK);
REG_GET_MASK     1464 drivers/thermal/tegra/soctherm.c 	state = REG_GET_MASK(r, THROT_STATUS_ENABLED_MASK);
REG_GET_MASK     1469 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, XPU_PSKIP_STATUS_ENABLED_MASK);
REG_GET_MASK     1472 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, XPU_PSKIP_STATUS_M_MASK);
REG_GET_MASK     1474 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, XPU_PSKIP_STATUS_N_MASK);
REG_GET_MASK     1476 drivers/thermal/tegra/soctherm.c 		state = REG_GET_MASK(r, XPU_PSKIP_STATUS_ENABLED_MASK);
REG_GET_MASK     1547 drivers/thermal/tegra/soctherm.c 	if (REG_GET_MASK(r, THROT_STATUS_STATE_MASK))
REG_GET_MASK     1953 drivers/thermal/tegra/soctherm.c 	r = REG_GET_MASK(r, THROT_PRIORITY_LOCK_PRIORITY_MASK);