REG_GET_2 151 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_GET_2(BL_PWM_PERIOD_CNTL, REG_GET_2 406 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c REG_GET_2(CC_DC_HDMI_STRAPS, REG_GET_2 714 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c REG_GET_2(LVTMA_PWRSEQ_CNTL, LVTMA_DIGON, &dig_on, LVTMA_DIGON_OVRD, &dig_on_ovrd); REG_GET_2 447 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c REG_GET_2(CC_DC_HDMI_STRAPS, REG_GET_2 424 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c REG_GET_2(CC_DC_HDMI_STRAPS, REG_GET_2 438 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c REG_GET_2(CC_DC_HDMI_STRAPS, REG_GET_2 864 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(BLANK_OFFSET_0, REG_GET_2 874 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DST_AFTER_SCALER, REG_GET_2 879 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(PREFETCH_SETTINS, REG_GET_2 883 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(PREFETCH_SETTINGS, REG_GET_2 887 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(VBLANK_PARAMETERS_0, REG_GET_2 915 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(PER_LINE_DELIVERY_PRE, REG_GET_2 919 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(PER_LINE_DELIVERY, REG_GET_2 951 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DCN_TTU_QOS_WM, REG_GET_2 955 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DCN_GLOBAL_TTU_CNTL, REG_GET_2 990 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, REG_GET_2 994 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DCSURF_SURFACE_CONFIG, REG_GET_2 1012 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_GET_2(DCN_TTU_QOS_WM, REG_GET_2 151 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_GET_2(MPCC_STATUS[mpcc_id], REG_GET_2 445 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c REG_GET_2(MPCC_STATUS[mpcc_inst], MPCC_IDLE, &s->idle, REG_GET_2 400 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_BLANK_CONTROL, REG_GET_2 623 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_STATUS_POSITION, REG_GET_2 1165 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_V_BLANK_START_END, REG_GET_2 1297 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_V_BLANK_START_END, REG_GET_2 1319 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_V_SYNC_A, REG_GET_2 1323 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_H_BLANK_START_END, REG_GET_2 1327 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_H_SYNC_A, REG_GET_2 1359 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_V_BLANK_START_END, REG_GET_2 1363 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_H_BLANK_START_END, REG_GET_2 1464 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET_2(OTG_CRC0_DATA_RG, REG_GET_2 69 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c REG_GET_2(DPPCLK_DTO_PARAM[dpp_inst], REG_GET_2 106 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); REG_GET_2 769 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c REG_GET_2(CM_3DLUT_READ_WRITE_CONTROL, REG_GET_2 538 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, REG_GET_2 1062 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(BLANK_OFFSET_0, REG_GET_2 1072 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DST_AFTER_SCALER, REG_GET_2 1077 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(PREFETCH_SETTINS, REG_GET_2 1081 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(PREFETCH_SETTINGS, REG_GET_2 1085 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(VBLANK_PARAMETERS_0, REG_GET_2 1113 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(PER_LINE_DELIVERY_PRE, REG_GET_2 1117 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(PER_LINE_DELIVERY, REG_GET_2 1149 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DCN_TTU_QOS_WM, REG_GET_2 1153 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DCN_GLOBAL_TTU_CNTL, REG_GET_2 1188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION, REG_GET_2 1192 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DCSURF_SURFACE_CONFIG, REG_GET_2 1210 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_GET_2(DCN_TTU_QOS_WM, REG_GET_2 298 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_GET_2(DPG_CONTROL, REG_GET_2 114 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c reg2 = REG_GET_2(gpio.MASK_reg,