REG_GENMASK      4716 drivers/gpu/drm/i915/i915_reg.h #define  POWER_CYCLE_DELAY_MASK		REG_GENMASK(8, 4)
REG_GENMASK      4729 drivers/gpu/drm/i915/i915_reg.h #define   PP_SEQUENCE_MASK		REG_GENMASK(29, 28)
REG_GENMASK      4734 drivers/gpu/drm/i915/i915_reg.h #define   PP_SEQUENCE_STATE_MASK	REG_GENMASK(3, 0)
REG_GENMASK      4747 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_UNLOCK_MASK		REG_GENMASK(31, 16)
REG_GENMASK      4749 drivers/gpu/drm/i915/i915_reg.h #define  BXT_POWER_CYCLE_DELAY_MASK	REG_GENMASK(8, 4)
REG_GENMASK      4757 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_PORT_SELECT_MASK		REG_GENMASK(31, 30)
REG_GENMASK      4763 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_POWER_UP_DELAY_MASK	REG_GENMASK(28, 16)
REG_GENMASK      4764 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_LIGHT_ON_DELAY_MASK	REG_GENMASK(12, 0)
REG_GENMASK      4768 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_POWER_DOWN_DELAY_MASK	REG_GENMASK(28, 16)
REG_GENMASK      4769 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_LIGHT_OFF_DELAY_MASK	REG_GENMASK(12, 0)
REG_GENMASK      4773 drivers/gpu/drm/i915/i915_reg.h #define  PP_REFERENCE_DIVIDER_MASK	REG_GENMASK(31, 8)
REG_GENMASK      4774 drivers/gpu/drm/i915/i915_reg.h #define  PANEL_POWER_CYCLE_DELAY_MASK	REG_GENMASK(4, 0)
REG_GENMASK      7509 drivers/gpu/drm/i915/i915_reg.h #define   ENGINE1_MASK			REG_GENMASK(31, 16)
REG_GENMASK      7510 drivers/gpu/drm/i915/i915_reg.h #define   ENGINE0_MASK			REG_GENMASK(15, 0)
REG_GENMASK      10275 drivers/gpu/drm/i915/i915_reg.h #define  PAL_PREC_MULTI_SEGMENT_INDEX_VALUE_MASK	REG_GENMASK(4, 0)