REG_EDP_PHY_GLB_PD_CTL   47 drivers/gpu/drm/msm/edp/edp_phy.c 		edp_write(phy->base + REG_EDP_PHY_GLB_PD_CTL, 0x3f);
REG_EDP_PHY_GLB_PD_CTL   50 drivers/gpu/drm/msm/edp/edp_phy.c 		edp_write(phy->base + REG_EDP_PHY_GLB_PD_CTL, 0xc0);