REG_EDP_INTERRUPT_REG_2  392 drivers/gpu/drm/msm/edp/edp_ctrl.c 		edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, EDP_INTR_MASK2);
REG_EDP_INTERRUPT_REG_2  395 drivers/gpu/drm/msm/edp/edp_ctrl.c 		edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, 0x0);
REG_EDP_INTERRUPT_REG_2 1036 drivers/gpu/drm/msm/edp/edp_ctrl.c 	isr2 = edp_read(ctrl->base + REG_EDP_INTERRUPT_REG_2);
REG_EDP_INTERRUPT_REG_2 1055 drivers/gpu/drm/msm/edp/edp_ctrl.c 	edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_2, ack);