REG_EDP_INTERRUPT_REG_1  391 drivers/gpu/drm/msm/edp/edp_ctrl.c 		edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1);
REG_EDP_INTERRUPT_REG_1  394 drivers/gpu/drm/msm/edp/edp_ctrl.c 		edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, 0x0);
REG_EDP_INTERRUPT_REG_1 1035 drivers/gpu/drm/msm/edp/edp_ctrl.c 	isr1 = edp_read(ctrl->base + REG_EDP_INTERRUPT_REG_1);
REG_EDP_INTERRUPT_REG_1 1050 drivers/gpu/drm/msm/edp/edp_ctrl.c 	edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, ack);