REG_DSI_28nm_PHY_PLL_VREG_CFG  449 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	cached_state->byte_mux = pll_read(base + REG_DSI_28nm_PHY_PLL_VREG_CFG);
REG_DSI_28nm_PHY_PLL_VREG_CFG  472 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	pll_write(base + REG_DSI_28nm_PHY_PLL_VREG_CFG,
REG_DSI_28nm_PHY_PLL_VREG_CFG  560 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 			REG_DSI_28nm_PHY_PLL_VREG_CFG, 1, 1, 0, NULL);