REG_DSI_20nm_PHY_REGULATOR_CAL_PWR_CFG   47 drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c 		dsi_phy_write(base + REG_DSI_20nm_PHY_REGULATOR_CAL_PWR_CFG, 0);
REG_DSI_20nm_PHY_REGULATOR_CAL_PWR_CFG   61 drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c 	dsi_phy_write(base + REG_DSI_20nm_PHY_REGULATOR_CAL_PWR_CFG, 0x01);