REG_DSI_14nm_PHY_CMN_CLK_CFG0  689 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 	val = pll_read(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0) >> shift;
REG_DSI_14nm_PHY_CMN_CLK_CFG0  731 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 	val = pll_read(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0);
REG_DSI_14nm_PHY_CMN_CLK_CFG0  735 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 	pll_write(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0, val);
REG_DSI_14nm_PHY_CMN_CLK_CFG0  744 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 		pll_write(slave_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0, val);
REG_DSI_14nm_PHY_CMN_CLK_CFG0  802 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 	data = pll_read(cmn_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0);
REG_DSI_14nm_PHY_CMN_CLK_CFG0  834 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 	pll_write(cmn_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0, data);
REG_DSI_14nm_PHY_CMN_CLK_CFG0  841 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 		pll_write(slave_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0, data);