REG_DSI_10nm_PHY_CMN_RBUF_CTRL  126 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c 	dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_RBUF_CTRL, 0x00);
REG_DSI_10nm_PHY_CMN_RBUF_CTRL  443 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 	pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_RBUF_CTRL,
REG_DSI_10nm_PHY_CMN_RBUF_CTRL  447 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 			  REG_DSI_10nm_PHY_CMN_RBUF_CTRL, 0x01);
REG_DSI_10nm_PHY_CMN_RBUF_CTRL  455 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 	pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_RBUF_CTRL, 0);