REG_DSI_10nm_PHY_CMN_PLL_CNTRL   16 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c 	data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_PLL_CNTRL);
REG_DSI_10nm_PHY_CMN_PLL_CNTRL  123 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c 	dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, 0x00);
REG_DSI_10nm_PHY_CMN_PLL_CNTRL  421 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 	pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL,
REG_DSI_10nm_PHY_CMN_PLL_CNTRL  470 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 	pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, 0);