AXS_MB_CREG        20 arch/arc/plat-axs10x/axs10x.c #define CREG_MB_IRQ_MUX		(AXS_MB_CREG + 0x214)
AXS_MB_CREG        21 arch/arc/plat-axs10x/axs10x.c #define CREG_MB_SW_RESET	(AXS_MB_CREG + 0x220)
AXS_MB_CREG        22 arch/arc/plat-axs10x/axs10x.c #define CREG_MB_VER		(AXS_MB_CREG + 0x230)
AXS_MB_CREG        23 arch/arc/plat-axs10x/axs10x.c #define CREG_MB_CONFIG		(AXS_MB_CREG + 0x234)
AXS_MB_CREG       268 arch/arc/plat-axs10x/axs10x.c 		axs101_set_memmap((void __iomem *) AXS_MB_CREG + (i << 4),
AXS_MB_CREG       271 arch/arc/plat-axs10x/axs10x.c 	iowrite32(0x3ff, (void __iomem *) AXS_MB_CREG + 0x100); /* Update */