REG_A6XX_GMU_RSCC_CONTROL_REQ  381 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 1 << 1);
REG_A6XX_GMU_RSCC_CONTROL_REQ  400 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);
REG_A6XX_GMU_RSCC_CONTROL_REQ  416 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 1);
REG_A6XX_GMU_RSCC_CONTROL_REQ  423 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_RSCC_CONTROL_REQ, 0);