REG_A6XX_GMU_GMU2HOST_INTR_MASK  659 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~0);
REG_A6XX_GMU_GMU2HOST_INTR_MASK  741 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_MASK, ~A6XX_HFI_IRQ_MASK);