REGBASE            18 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_STRAP_0	(0x000010+REGBASE)
REGBASE            19 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_ST_0	(0x000030+REGBASE)
REGBASE            20 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_ST_1	(0x000034+REGBASE)
REGBASE            21 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_ST_2	(0x000038+REGBASE)
REGBASE            22 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_EN_0	(0x000040+REGBASE)
REGBASE            23 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_EN_1	(0x000044+REGBASE)
REGBASE            24 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT_EN_2	(0x000048+REGBASE)
REGBASE            25 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT1_EN_0	(0x000050+REGBASE)
REGBASE            26 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT1_EN_1	(0x000054+REGBASE)
REGBASE            27 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_INT1_EN_2	(0x000058+REGBASE)
REGBASE            28 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_SW_INT	(0x000070+REGBASE)
REGBASE            29 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_SW_INT_EN	(0x000080+REGBASE)
REGBASE            30 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_SW_INT_CLR (0x000090+REGBASE)
REGBASE            31 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_MAIN_CTRL	(0x0000b4+REGBASE)
REGBASE            32 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_BHIF_EXCEPT_VECT_BASE_ADDRESS	(0x0000c0+REGBASE)
REGBASE            33 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_DIR	(0x110d20+REGBASE)
REGBASE            34 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_INT_ST	(0x110d30+REGBASE)
REGBASE            35 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_INT_MASK	(0x110d3c+REGBASE)
REGBASE            36 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_INT_MODE	(0x110d48+REGBASE)
REGBASE            37 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_INT_CND_A	(0x110d54+REGBASE)
REGBASE            38 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_GPIO_INT_CND_B	(0x110d60+REGBASE)
REGBASE            39 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PBRD_INT_EN	(0x100010+REGBASE)
REGBASE            40 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PBRD_CLKSEL	(0x100028+REGBASE)
REGBASE            41 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PFUR0_BASE	(0x101000+REGBASE)
REGBASE            42 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PFUR1_BASE	(0x102000+REGBASE)
REGBASE            43 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PFUR2_BASE	(0x103000+REGBASE)
REGBASE            44 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PIIC0_BASE	(0x107000+REGBASE)
REGBASE            45 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PIIC1_BASE	(0x108000+REGBASE)
REGBASE            46 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PIIC2_BASE	(0x109000+REGBASE)
REGBASE            47 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_CONTROL	(0x200000+REGBASE)
REGBASE            48 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_ARBIT_CTR	(0x200004+REGBASE)
REGBASE            49 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_IWIN0_CTR	(0x200010+REGBASE)
REGBASE            50 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_IWIN1_CTR	(0x200014+REGBASE)
REGBASE            51 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_INIT_ESWP	(0x200018+REGBASE)
REGBASE            52 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_INT		(0x200020+REGBASE)
REGBASE            53 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_INT_EN	(0x200024+REGBASE)
REGBASE            54 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_TWIN_CTR	(0x200030+REGBASE)
REGBASE            55 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_TWIN_BADR	(0x200034+REGBASE)
REGBASE            56 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_TWIN0_DADR	(0x200038+REGBASE)
REGBASE            57 arch/mips/include/asm/emma/emma2rh.h #define EMMA2RH_PCI_TWIN1_DADR	(0x20003c+REGBASE)
REGBASE            11 arch/mips/include/asm/mach-rc32434/irq.h #define IC_GROUP0_PEND		(REGBASE + 0x38000)
REGBASE            12 arch/mips/include/asm/mach-rc32434/irq.h #define IC_GROUP0_MASK		(REGBASE + 0x38008)
REGBASE            13 arch/mips/include/asm/mach-rc32434/rb.h #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
REGBASE           222 arch/mips/rb532/devices.c 		.membase	= (char *)KSEG1ADDR(REGBASE + UART0BASE),
REGBASE            48 arch/mips/rb532/gpio.c 		.start	= REGBASE + GPIOBASE,
REGBASE            49 arch/mips/rb532/gpio.c 		.end	= REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
REGBASE            44 arch/mips/rb532/serial.c 	.membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),