REG32             606 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_END_OFFSET),
REG32             607 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_START_VERTEX),
REG32             608 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_VERTEX_COUNT),
REG32             609 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_INSTANCE_COUNT),
REG32             610 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_START_INSTANCE),
REG32             611 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_3DPRIM_BASE_VERTEX),
REG32             612 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_GPGPU_DISPATCHDIMX),
REG32             613 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_GPGPU_DISPATCHDIMY),
REG32             614 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_GPGPU_DISPATCHDIMZ),
REG32             624 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_SO_WRITE_OFFSET(0)),
REG32             625 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_SO_WRITE_OFFSET(1)),
REG32             626 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_SO_WRITE_OFFSET(2)),
REG32             627 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_SO_WRITE_OFFSET(3)),
REG32             628 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_L3SQCREG1),
REG32             629 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_L3CNTLREG2),
REG32             630 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(GEN7_L3CNTLREG3),
REG32             651 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(HSW_SCRATCH1,
REG32             654 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(HSW_ROW_CHICKEN3,
REG32             663 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(BCS_SWCTRL),
REG32             670 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG32(BCS_SWCTRL),