REG2 182 arch/sparc/include/asm/trap_block.h #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ REG2 184 arch/sparc/include/asm/trap_block.h sethi %hi(trap_block), REG2; \ REG2 186 arch/sparc/include/asm/trap_block.h or REG2, %lo(trap_block), REG2; \ REG2 187 arch/sparc/include/asm/trap_block.h add REG2, REG1, REG2; \ REG2 188 arch/sparc/include/asm/trap_block.h ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST; REG2 211 arch/sparc/include/asm/trap_block.h #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) REG2 99 arch/sparc/include/asm/tsb.h #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ REG2 100 arch/sparc/include/asm/tsb.h 661: casa [TSB] ASI_N, REG1, REG2; \ REG2 103 arch/sparc/include/asm/tsb.h casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ REG2 106 arch/sparc/include/asm/tsb.h #define TSB_CAS_TAG(TSB, REG1, REG2) \ REG2 107 arch/sparc/include/asm/tsb.h 661: casxa [TSB] ASI_N, REG1, REG2; \ REG2 110 arch/sparc/include/asm/tsb.h casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ REG2 120 arch/sparc/include/asm/tsb.h #define TSB_LOCK_TAG(TSB, REG1, REG2) \ REG2 122 arch/sparc/include/asm/tsb.h sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ REG2 123 arch/sparc/include/asm/tsb.h andcc REG1, REG2, %g0; \ REG2 126 arch/sparc/include/asm/tsb.h TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ REG2 127 arch/sparc/include/asm/tsb.h cmp REG1, REG2; \ REG2 156 arch/sparc/include/asm/tsb.h #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \ REG2 159 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ REG2 160 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 161 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 162 arch/sparc/include/asm/tsb.h ldx [REG1 + REG2], REG1; \ REG2 164 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \ REG2 165 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 166 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 167 arch/sparc/include/asm/tsb.h ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 169 arch/sparc/include/asm/tsb.h sethi %uhi(_PAGE_PUD_HUGE), REG2; \ REG2 171 arch/sparc/include/asm/tsb.h sllx REG2, 32, REG2; \ REG2 172 arch/sparc/include/asm/tsb.h andcc REG1, REG2, %g0; \ REG2 173 arch/sparc/include/asm/tsb.h sethi %hi(0xf8000000), REG2; \ REG2 175 arch/sparc/include/asm/tsb.h sllx REG2, 1, REG2; \ REG2 176 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ REG2 177 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 178 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 179 arch/sparc/include/asm/tsb.h ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 180 arch/sparc/include/asm/tsb.h sethi %uhi(_PAGE_PMD_HUGE), REG2; \ REG2 182 arch/sparc/include/asm/tsb.h sllx REG2, 32, REG2; \ REG2 183 arch/sparc/include/asm/tsb.h andcc REG1, REG2, %g0; \ REG2 185 arch/sparc/include/asm/tsb.h sethi %hi(0x400000), REG2; \ REG2 187 arch/sparc/include/asm/tsb.h andn REG1, REG2, REG1; \ REG2 188 arch/sparc/include/asm/tsb.h and VADDR, REG2, REG2; \ REG2 190 arch/sparc/include/asm/tsb.h or REG1, REG2, REG1; \ REG2 191 arch/sparc/include/asm/tsb.h 698: sllx VADDR, 64 - PMD_SHIFT, REG2; \ REG2 192 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 193 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 194 arch/sparc/include/asm/tsb.h ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 208 arch/sparc/include/asm/tsb.h #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ REG2 216 arch/sparc/include/asm/tsb.h sethi %uhi(_PAGE_PUD_HUGE), REG2; \ REG2 217 arch/sparc/include/asm/tsb.h sllx REG2, 32, REG2; \ REG2 218 arch/sparc/include/asm/tsb.h andcc REG1, REG2, %g0; \ REG2 220 arch/sparc/include/asm/tsb.h sethi %hi(0xffe00000), REG2; \ REG2 221 arch/sparc/include/asm/tsb.h sllx REG2, 1, REG2; \ REG2 223 arch/sparc/include/asm/tsb.h andn REG1, REG2, REG1; \ REG2 224 arch/sparc/include/asm/tsb.h and VADDR, REG2, REG2; \ REG2 226 arch/sparc/include/asm/tsb.h or REG1, REG2, REG1; \ REG2 229 arch/sparc/include/asm/tsb.h #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ REG2 243 arch/sparc/include/asm/tsb.h #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ REG2 245 arch/sparc/include/asm/tsb.h sethi %uhi(_PAGE_PMD_HUGE), REG2; \ REG2 246 arch/sparc/include/asm/tsb.h sllx REG2, 32, REG2; \ REG2 247 arch/sparc/include/asm/tsb.h andcc REG1, REG2, %g0; \ REG2 249 arch/sparc/include/asm/tsb.h sethi %hi(4 * 1024 * 1024), REG2; \ REG2 251 arch/sparc/include/asm/tsb.h andn REG1, REG2, REG1; \ REG2 252 arch/sparc/include/asm/tsb.h and VADDR, REG2, REG2; \ REG2 254 arch/sparc/include/asm/tsb.h or REG1, REG2, REG1; \ REG2 257 arch/sparc/include/asm/tsb.h #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \ REG2 271 arch/sparc/include/asm/tsb.h #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL) \ REG2 272 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ REG2 273 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 274 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 275 arch/sparc/include/asm/tsb.h ldxa [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 277 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PUD_SHIFT + PUD_BITS), REG2; \ REG2 278 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 279 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 280 arch/sparc/include/asm/tsb.h ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 281 arch/sparc/include/asm/tsb.h USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \ REG2 283 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ REG2 284 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 285 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 286 arch/sparc/include/asm/tsb.h ldxa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ REG2 287 arch/sparc/include/asm/tsb.h USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \ REG2 288 arch/sparc/include/asm/tsb.h sllx VADDR, 64 - PMD_SHIFT, REG2; \ REG2 289 arch/sparc/include/asm/tsb.h srlx REG2, 64 - PAGE_SHIFT, REG2; \ REG2 290 arch/sparc/include/asm/tsb.h andn REG2, 0x7, REG2; \ REG2 291 arch/sparc/include/asm/tsb.h add REG1, REG2, REG1; \ REG2 302 arch/sparc/include/asm/tsb.h #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \ REG2 305 arch/sparc/include/asm/tsb.h 97: ldx [REG1 + 0x00], REG2; \ REG2 306 arch/sparc/include/asm/tsb.h brz,pn REG2, FAIL_LABEL; \ REG2 309 arch/sparc/include/asm/tsb.h add REG2, REG3, REG3; \ REG2 310 arch/sparc/include/asm/tsb.h cmp REG2, VADDR; \ REG2 315 arch/sparc/include/asm/tsb.h sub VADDR, REG2, REG2; \ REG2 317 arch/sparc/include/asm/tsb.h add REG3, REG2, REG1; \ REG2 338 arch/sparc/include/asm/tsb.h #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ REG2 340 arch/sparc/include/asm/tsb.h sethi %hi(swapper_tsb), REG2; \ REG2 342 arch/sparc/include/asm/tsb.h or REG2, %lo(swapper_tsb), REG2; \ REG2 347 arch/sparc/include/asm/tsb.h or REG1, REG2, REG1; \ REG2 348 arch/sparc/include/asm/tsb.h srlx VADDR, PAGE_SHIFT, REG2; \ REG2 349 arch/sparc/include/asm/tsb.h and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ REG2 350 arch/sparc/include/asm/tsb.h sllx REG2, 4, REG2; \ REG2 351 arch/sparc/include/asm/tsb.h add REG1, REG2, REG2; \ REG2 352 arch/sparc/include/asm/tsb.h TSB_LOAD_QUAD(REG2, REG3); \ REG2 361 arch/sparc/include/asm/tsb.h #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ REG2 363 arch/sparc/include/asm/tsb.h sethi %hi(swapper_4m_tsb), REG2; \ REG2 365 arch/sparc/include/asm/tsb.h or REG2, %lo(swapper_4m_tsb), REG2; \ REG2 370 arch/sparc/include/asm/tsb.h or REG1, REG2, REG1; \ REG2 371 arch/sparc/include/asm/tsb.h and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ REG2 372 arch/sparc/include/asm/tsb.h sllx REG2, 4, REG2; \ REG2 373 arch/sparc/include/asm/tsb.h add REG1, REG2, REG2; \ REG2 374 arch/sparc/include/asm/tsb.h TSB_LOAD_QUAD(REG2, REG3); \ REG2 164 drivers/crypto/caam/caamalg_desc.c append_math_sub(desc, REG2, SEQOUTLEN, REG0, CAAM_CMD_SZ); REG2 167 drivers/crypto/caam/caamalg_desc.c append_math_add(desc, VARSEQINLEN, ZERO, REG2, CAAM_CMD_SZ); REG2 168 drivers/crypto/caam/caamalg_desc.c append_math_add(desc, VARSEQOUTLEN, ZERO, REG2, CAAM_CMD_SZ); REG2 519 drivers/regulator/act8865-regulator.c ACT88xx_REG("REG2", ACT8846, REG2, VSET0, "vp2"), REG2 344 drivers/scsi/aic94xx/aic94xx_dump.c PRINT_MIS_dword(asd_ha, REG2); REG2 740 sound/sparc/dbri.c sbus_readl(dbri->regs + REG2), REG2 1453 sound/sparc/dbri.c (dbri->mm.onboard ? D_PIO0 : D_PIO2), dbri->regs + REG2); REG2 1501 sound/sparc/dbri.c sbus_writel(val, dbri->regs + REG2); REG2 1645 sound/sparc/dbri.c u32 reg2 = sbus_readl(dbri->regs + REG2); REG2 1660 sound/sparc/dbri.c sbus_writel(D_ENPIO2, dbri->regs + REG2); REG2 2483 sound/sparc/dbri.c snd_iprintf(buffer, "REG2: 0x%x\n", sbus_readl(dbri->regs + REG2));