READ_REG 289 arch/ia64/hp/common/sba_iommu.c DBG_INIT("IOC_IBASE : %016lx\n", READ_REG(hpa+IOC_IBASE)); READ_REG 290 arch/ia64/hp/common/sba_iommu.c DBG_INIT("IOC_IMASK : %016lx\n", READ_REG(hpa+IOC_IMASK)); READ_REG 291 arch/ia64/hp/common/sba_iommu.c DBG_INIT("IOC_TCNFG : %016lx\n", READ_REG(hpa+IOC_TCNFG)); READ_REG 292 arch/ia64/hp/common/sba_iommu.c DBG_INIT("IOC_PDIR_BASE: %016lx\n", READ_REG(hpa+IOC_PDIR_BASE)); READ_REG 666 arch/ia64/hp/common/sba_iommu.c READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ READ_REG 1089 arch/ia64/hp/common/sba_iommu.c READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ READ_REG 1097 arch/ia64/hp/common/sba_iommu.c READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ READ_REG 1589 arch/ia64/hp/common/sba_iommu.c ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & ~0x1UL; READ_REG 1590 arch/ia64/hp/common/sba_iommu.c ioc->imask = READ_REG(ioc->ioc_hpa + IOC_IMASK) | 0xFFFFFFFF00000000UL; READ_REG 1672 arch/ia64/hp/common/sba_iommu.c READ_REG(ioc->ioc_hpa + IOC_PCOM); READ_REG 1676 arch/ia64/hp/common/sba_iommu.c READ_REG(ioc->ioc_hpa + IOC_IBASE); READ_REG 1762 arch/ia64/hp/common/sba_iommu.c rope_config = READ_REG(ioc->ioc_hpa + IOC_ROPE0_CFG + i); READ_REG 1792 arch/ia64/hp/common/sba_iommu.c ioc->func_id = READ_REG(ioc->ioc_hpa + IOC_FUNC_ID); READ_REG 1793 arch/ia64/hp/common/sba_iommu.c ioc->rev = READ_REG(ioc->ioc_hpa + IOC_FCLASS) & 0xFFUL; READ_REG 143 drivers/ata/pata_opti.c opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); READ_REG 169 drivers/ata/pata_optidma.c iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG); READ_REG 172 drivers/ata/pata_optidma.c iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG); READ_REG 2817 drivers/atm/iphase.c case READ_REG: READ_REG 116 drivers/ide/opti621.c write_reg(tim, READ_REG); READ_REG 199 drivers/net/ethernet/tehuti/tehuti.c u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT; READ_REG 255 drivers/net/ethernet/tehuti/tehuti.c isr = (READ_REG(priv, regISR) & IR_RUN); READ_REG 277 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regTXF_WPTR_0); READ_REG 278 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regRXD_WPTR_0); READ_REG 325 drivers/net/ethernet/tehuti/tehuti.c master = READ_REG(priv, regINIT_SEMAPHORE); READ_REG 326 drivers/net/ethernet/tehuti/tehuti.c if (!READ_REG(priv, regINIT_STATUS) && master) { READ_REG 334 drivers/net/ethernet/tehuti/tehuti.c if (READ_REG(priv, regINIT_STATUS)) { READ_REG 351 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regVPC), READ_REG 352 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regVIC), READ_REG 353 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regINIT_STATUS), i); READ_REG 367 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regUNC_MAC0_A), READ_REG 368 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A)); READ_REG 378 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regUNC_MAC0_A), READ_REG 379 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A)); READ_REG 479 drivers/net/ethernet/tehuti/tehuti.c val = READ_REG(priv, regCLKPLL); READ_REG 482 drivers/net/ethernet/tehuti/tehuti.c val = READ_REG(priv, regCLKPLL); READ_REG 487 drivers/net/ethernet/tehuti/tehuti.c if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) { READ_REG 489 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regRXD_CFG0_0); READ_REG 511 drivers/net/ethernet/tehuti/tehuti.c if (READ_REG(priv, regRST_PORT) & 1) READ_REG 522 drivers/net/ethernet/tehuti/tehuti.c READ_REG(priv, regISR); READ_REG 530 drivers/net/ethernet/tehuti/tehuti.c DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR); READ_REG 545 drivers/net/ethernet/tehuti/tehuti.c DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR); READ_REG 666 drivers/net/ethernet/tehuti/tehuti.c data[2] = READ_REG(priv, data[1]); READ_REG 718 drivers/net/ethernet/tehuti/tehuti.c val = READ_REG(priv, reg); READ_REG 813 drivers/net/ethernet/tehuti/tehuti.c val = READ_REG(priv, reg); READ_REG 848 drivers/net/ethernet/tehuti/tehuti.c macAddress[2] = READ_REG(priv, regUNC_MAC0_A); READ_REG 849 drivers/net/ethernet/tehuti/tehuti.c macAddress[2] = READ_REG(priv, regUNC_MAC0_A); READ_REG 850 drivers/net/ethernet/tehuti/tehuti.c macAddress[1] = READ_REG(priv, regUNC_MAC1_A); READ_REG 851 drivers/net/ethernet/tehuti/tehuti.c macAddress[1] = READ_REG(priv, regUNC_MAC1_A); READ_REG 852 drivers/net/ethernet/tehuti/tehuti.c macAddress[0] = READ_REG(priv, regUNC_MAC2_A); READ_REG 853 drivers/net/ethernet/tehuti/tehuti.c macAddress[0] = READ_REG(priv, regUNC_MAC2_A); READ_REG 865 drivers/net/ethernet/tehuti/tehuti.c val = READ_REG(priv, reg); READ_REG 866 drivers/net/ethernet/tehuti/tehuti.c val |= ((u64) READ_REG(priv, reg + 8)) << 32; READ_REG 1211 drivers/net/ethernet/tehuti/tehuti.c f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR; READ_REG 1583 drivers/net/ethernet/tehuti/tehuti.c f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR; READ_REG 1719 drivers/net/ethernet/tehuti/tehuti.c f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK; READ_REG 891 drivers/parisc/lba_pci.c t = READ_REG##size(astro_iop_base + addr); \ READ_REG 974 drivers/parisc/lba_pci.c t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \ READ_REG 840 drivers/parisc/sba_iommu.c READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ READ_REG 848 drivers/parisc/sba_iommu.c READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ READ_REG 1273 drivers/parisc/sba_iommu.c ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE); READ_REG 1274 drivers/parisc/sba_iommu.c iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; READ_REG 1570 drivers/parisc/sba_iommu.c ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL); READ_REG 1642 drivers/parisc/sba_iommu.c cfg_val = READ_REG(rope_cfg); READ_REG 1654 drivers/parisc/sba_iommu.c READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL); READ_REG 1658 drivers/parisc/sba_iommu.c READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40), READ_REG 1659 drivers/parisc/sba_iommu.c READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50) READ_REG 1662 drivers/parisc/sba_iommu.c READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108), READ_REG 1663 drivers/parisc/sba_iommu.c READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400) READ_REG 1894 drivers/parisc/sba_iommu.c func_class = READ_REG(sba_addr + SBA_FCLASS); READ_REG 1901 drivers/parisc/sba_iommu.c fclass = READ_REG(sba_addr); READ_REG 598 drivers/staging/rts5208/ms.c retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, READ_REG 1239 drivers/staging/rts5208/ms.c retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2); READ_REG 1318 drivers/staging/rts5208/ms.c retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, READ_REG 76 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { READ_REG 78 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { READ_REG 89 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { READ_REG 91 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { READ_REG 102 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { READ_REG 104 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { READ_REG 115 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { READ_REG 117 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { READ_REG 119 drivers/watchdog/ar7_wdt.c if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {