RCV_INT            74 drivers/net/ethernet/hisilicon/hip04_eth.c #define DEF_INT_MASK			(RCV_INT | DEF_INT_ERR)
RCV_INT           381 drivers/net/ethernet/hisilicon/hip04_eth.c 	val = RCV_INT;
RCV_INT           560 drivers/net/ethernet/hisilicon/hip04_eth.c 			priv->reg_inten &= ~(RCV_INT);
RCV_INT           561 drivers/net/ethernet/hisilicon/hip04_eth.c 			writel_relaxed(DEF_INT_MASK & ~RCV_INT,
RCV_INT           647 drivers/net/ethernet/hisilicon/hip04_eth.c 	if (!(priv->reg_inten & RCV_INT)) {
RCV_INT           649 drivers/net/ethernet/hisilicon/hip04_eth.c 		priv->reg_inten |= RCV_INT;
RCV_INT           685 drivers/net/ethernet/hisilicon/hip04_eth.c 	if (ists & RCV_INT && napi_schedule_prep(&priv->napi)) {
RCV_INT           687 drivers/net/ethernet/hisilicon/hip04_eth.c 		priv->reg_inten &= ~(RCV_INT);
RCV_INT           688 drivers/net/ethernet/hisilicon/hip04_eth.c 		writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN);
RCV_INT           704 drivers/net/ethernet/hisilicon/hip04_eth.c 		priv->reg_inten &= ~(RCV_INT);
RCV_INT           705 drivers/net/ethernet/hisilicon/hip04_eth.c 		writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN);