RADEON_TV_PLL_CNTL1 763 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL); RADEON_TV_PLL_CNTL1 765 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET); RADEON_TV_PLL_CNTL1 769 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET); RADEON_TV_PLL_CNTL1 774 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf); RADEON_TV_PLL_CNTL1 775 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL); RADEON_TV_PLL_CNTL1 777 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK); RADEON_TV_PLL_CNTL1 778 drivers/gpu/drm/radeon/radeon_legacy_tv.c WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);