RADEON_SCLK_CNTL 57 drivers/gpu/drm/radeon/radeon_clocks.c post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK; RADEON_SCLK_CNTL 403 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 405 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 447 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 464 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 481 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 495 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 499 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 518 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 555 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 571 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 636 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 639 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 668 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 686 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 741 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 749 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 752 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 761 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 796 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 805 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp); RADEON_SCLK_CNTL 841 drivers/gpu/drm/radeon/radeon_clocks.c tmp = RREG32_PLL(RADEON_SCLK_CNTL); RADEON_SCLK_CNTL 866 drivers/gpu/drm/radeon/radeon_clocks.c WREG32_PLL(RADEON_SCLK_CNTL, tmp);