RADEON_PPLL_REF_DIV_MASK  204 drivers/gpu/drm/radeon/radeon_clocks.c 					p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK;
RADEON_PPLL_REF_DIV_MASK  934 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			if ((pll_ref_div == (RREG32_PLL(RADEON_PPLL_REF_DIV) & RADEON_PPLL_REF_DIV_MASK)) &&
RADEON_PPLL_REF_DIV_MASK  983 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 				     ~RADEON_PPLL_REF_DIV_MASK);
RADEON_PPLL_REF_DIV_MASK 1011 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			  pll_ref_div & RADEON_PPLL_REF_DIV_MASK,