R600_WB_IH_WPTR_OFFSET 6994 drivers/gpu/drm/radeon/cik.c 	WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);
R600_WB_IH_WPTR_OFFSET 6995 drivers/gpu/drm/radeon/cik.c 	WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);
R600_WB_IH_WPTR_OFFSET 7501 drivers/gpu/drm/radeon/cik.c 		wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
R600_WB_IH_WPTR_OFFSET 4681 drivers/gpu/drm/radeon/evergreen.c 		wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
R600_WB_IH_WPTR_OFFSET 3721 drivers/gpu/drm/radeon/r600.c 	WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);
R600_WB_IH_WPTR_OFFSET 3722 drivers/gpu/drm/radeon/r600.c 	WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);
R600_WB_IH_WPTR_OFFSET 4045 drivers/gpu/drm/radeon/r600.c 		wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
R600_WB_IH_WPTR_OFFSET 6022 drivers/gpu/drm/radeon/si.c 	WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);
R600_WB_IH_WPTR_OFFSET 6023 drivers/gpu/drm/radeon/si.c 	WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);
R600_WB_IH_WPTR_OFFSET 6215 drivers/gpu/drm/radeon/si.c 		wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);