R128_WRITE         91 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
R128_WRITE        181 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_MICROCODE_ADDR, 0);
R128_WRITE        183 drivers/gpu/drm/r128/r128_cce.c 		R128_WRITE(R128_PM4_MICROCODE_DATAH,
R128_WRITE        185 drivers/gpu/drm/r128/r128_cce.c 		R128_WRITE(R128_PM4_MICROCODE_DATAL,
R128_WRITE        203 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, tmp);
R128_WRITE        238 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_CNTL,
R128_WRITE        242 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN);
R128_WRITE        253 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
R128_WRITE        254 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
R128_WRITE        264 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_MICRO_CNTL, 0);
R128_WRITE        265 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_CNTL,
R128_WRITE        289 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI);
R128_WRITE        291 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI);
R128_WRITE        295 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
R128_WRITE        296 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl);
R128_WRITE        329 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET);
R128_WRITE        331 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
R128_WRITE        332 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
R128_WRITE        335 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_PM4_BUFFER_WM_CNTL,
R128_WRITE        346 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_BUS_CNTL, tmp);
R128_WRITE        557 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
R128_WRITE        560 drivers/gpu/drm/r128/r128_cce.c 	R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch);
R128_WRITE        578 drivers/gpu/drm/r128/r128_cce.c 		R128_WRITE(R128_PCI_GART_PAGE, dev_priv->gart_info.bus_addr);
R128_WRITE        415 drivers/gpu/drm/r128/r128_drv.h 	R128_WRITE(R128_CLOCK_CNTL_DATA, (val));			\
R128_WRITE        531 drivers/gpu/drm/r128/r128_drv.h 	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail);	\
R128_WRITE         60 drivers/gpu/drm/r128/r128_irq.c 		R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
R128_WRITE         77 drivers/gpu/drm/r128/r128_irq.c 	R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN);
R128_WRITE        100 drivers/gpu/drm/r128/r128_irq.c 	R128_WRITE(R128_GEN_INT_CNTL, 0);
R128_WRITE        102 drivers/gpu/drm/r128/r128_irq.c 	R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
R128_WRITE        117 drivers/gpu/drm/r128/r128_irq.c 	R128_WRITE(R128_GEN_INT_CNTL, 0);
R128_WRITE       1239 drivers/gpu/drm/r128/r128_state.c 	R128_WRITE(R128_CRTC_OFFSET, dev_priv->front_offset);
R128_WRITE       1240 drivers/gpu/drm/r128/r128_state.c 	R128_WRITE(R128_CRTC_OFFSET_CNTL,
R128_WRITE       1255 drivers/gpu/drm/r128/r128_state.c 	R128_WRITE(R128_CRTC_OFFSET, dev_priv->crtc_offset);
R128_WRITE       1256 drivers/gpu/drm/r128/r128_state.c 	R128_WRITE(R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl);