AVIVO_D1CUR_CONTROL   72 drivers/gpu/drm/radeon/radeon_cursor.c 		WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
AVIVO_D1CUR_CONTROL  119 drivers/gpu/drm/radeon/radeon_cursor.c 		WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);