AUX_SW_STATUS     200 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0,
AUX_SW_STATUS     268 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	*sw_status = REG_GET(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT,
AUX_SW_STATUS     329 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1,
AUX_SW_STATUS     332 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 	value = REG_READ(AUX_SW_STATUS);
AUX_SW_STATUS     358 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c 				AUX_SW_STATUS,
AUX_SW_STATUS      39 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	SRI(AUX_SW_STATUS, DP_AUX, id)
AUX_SW_STATUS      48 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	SRI(AUX_SW_STATUS, DP_AUX, id), \
AUX_SW_STATUS      58 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h 	uint32_t AUX_SW_STATUS;
AUX_SW_STATUS     153 drivers/gpu/drm/radeon/radeon_dp_auxch.c 		tmp = RREG32(AUX_SW_STATUS + aux_offset[instance]);