QLCNIC_PCIX_PS_REG  431 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_VECTOR		(QLCNIC_PCIX_PS_REG(PCIX_INT_VECTOR))
QLCNIC_PCIX_PS_REG  432 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_MASK		(QLCNIC_PCIX_PS_REG(PCIX_INT_MASK))
QLCNIC_PCIX_PS_REG  433 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_MASK_SLOW	(QLCNIC_PCIX_PS_REG(PCIX_INT_MASK))
QLCNIC_PCIX_PS_REG  434 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS	(QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS))
QLCNIC_PCIX_PS_REG  435 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK	(QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK))
QLCNIC_PCIX_PS_REG  436 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F1   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F1))
QLCNIC_PCIX_PS_REG  437 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F1     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F1))
QLCNIC_PCIX_PS_REG  438 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F2   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F2))
QLCNIC_PCIX_PS_REG  439 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F2     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F2))
QLCNIC_PCIX_PS_REG  440 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F3   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F3))
QLCNIC_PCIX_PS_REG  441 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F3     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F3))
QLCNIC_PCIX_PS_REG  442 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F4   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F4))
QLCNIC_PCIX_PS_REG  443 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F4     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F4))
QLCNIC_PCIX_PS_REG  444 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F5   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F5))
QLCNIC_PCIX_PS_REG  445 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F5     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F5))
QLCNIC_PCIX_PS_REG  446 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F6   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F6))
QLCNIC_PCIX_PS_REG  447 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F6     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F6))
QLCNIC_PCIX_PS_REG  448 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_STATUS_F7   (QLCNIC_PCIX_PS_REG(PCIX_TARGET_STATUS_F7))
QLCNIC_PCIX_PS_REG  449 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_TARGET_MASK_F7     (QLCNIC_PCIX_PS_REG(PCIX_TARGET_MASK_F7))
QLCNIC_PCIX_PS_REG  604 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define ISR_INT_STATE_REG       (QLCNIC_PCIX_PS_REG(PCIE_MISCCFG_RC))
QLCNIC_PCIX_PS_REG  678 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define	ISR_MSI_INT_TRIGGER(FUNC) (QLCNIC_PCIX_PS_REG(PCIX_MSI_F(FUNC)))
QLCNIC_PCIX_PS_REG 1197 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c 	offset = QLCNIC_PCIX_PS_REG(PCIX_OCM_WINDOW_REG(ahw->pci_func));