PXA_IRQ 17 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ PXA_IRQ 18 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ PXA_IRQ 19 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI,PXA27x) */ PXA_IRQ 20 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */ PXA_IRQ 21 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ PXA_IRQ 22 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt (PXA27x) */ PXA_IRQ 23 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */ PXA_IRQ 24 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ PXA_IRQ 25 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ PXA_IRQ 26 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ PXA_IRQ 27 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ PXA_IRQ 28 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */ PXA_IRQ 29 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ PXA_IRQ 30 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USB PXA_IRQ(11) /* USB Service */ PXA_IRQ 31 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ PXA_IRQ 32 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt (PXA27x) */ PXA_IRQ 33 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */ PXA_IRQ 34 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ PXA_IRQ 35 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ PXA_IRQ 36 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ PXA_IRQ 37 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */ PXA_IRQ 38 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */ PXA_IRQ 39 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ PXA_IRQ 40 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ PXA_IRQ 41 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ PXA_IRQ 42 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */ PXA_IRQ 43 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ PXA_IRQ 44 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ PXA_IRQ 45 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ PXA_IRQ 46 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */ PXA_IRQ 47 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */ PXA_IRQ 48 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */ PXA_IRQ 49 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */ PXA_IRQ 50 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */ PXA_IRQ 51 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */ PXA_IRQ 52 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */ PXA_IRQ 53 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ PXA_IRQ 54 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ PXA_IRQ 56 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ PXA_IRQ 57 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ PXA_IRQ 58 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ PXA_IRQ 59 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */ PXA_IRQ 60 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ PXA_IRQ 61 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */ PXA_IRQ 62 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ PXA_IRQ 63 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */ PXA_IRQ 64 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */ PXA_IRQ 65 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ PXA_IRQ 66 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball (PXA930) */ PXA_IRQ 67 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ PXA_IRQ 68 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ PXA_IRQ 69 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ PXA_IRQ 70 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ PXA_IRQ 71 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ PXA_IRQ 72 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ PXA_IRQ 73 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ PXA_IRQ 75 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */ PXA_IRQ 76 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */ PXA_IRQ 77 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ PXA_IRQ 78 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ PXA_IRQ 79 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ PXA_IRQ 80 arch/arm/mach-pxa/include/mach/irqs.h #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ PXA_IRQ 82 arch/arm/mach-pxa/include/mach/irqs.h #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) PXA_IRQ 103 arch/arm/mach-pxa/irq.c handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); PXA_IRQ 117 arch/arm/mach-pxa/irq.c handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); PXA_IRQ 150 arch/arm/mach-pxa/irq.c PXA_IRQ(0), 0,