PXA1928_CLK_UART2  102 drivers/clk/mmp/clk-of-pxa1928.c 	{0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_UART2 * 4, 4, 3, 0, &uart2_lock},
PXA1928_CLK_UART2  125 drivers/clk/mmp/clk-of-pxa1928.c 	{PXA1928_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, PXA1928_CLK_UART2 * 4, 0x3, 0x3, 0x0, 0, &uart2_lock},