PWR_INTF_SDIO_MSK   69 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK   89 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK   96 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  100 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  104 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  107 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  110 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  115 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  118 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  130 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  134 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  138 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  144 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  147 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  152 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  155 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  207 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK   93 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC,	\
PWR_INTF_SDIO_MSK   99 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  102 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  110 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  113 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  124 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  127 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  130 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  134 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC,		\
PWR_INTF_SDIO_MSK  140 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  143 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  151 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  154 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  157 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  160 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  223 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  234 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK   88 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK   99 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  103 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  111 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  114 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  126 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, \
PWR_INTF_SDIO_MSK  134 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  138 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  147 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  151 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK  230 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h 		PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO,\
PWR_INTF_SDIO_MSK   45 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK   49 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK   53 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK   57 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  135 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC,	\
PWR_INTF_SDIO_MSK  139 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC,	\
PWR_INTF_SDIO_MSK  151 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC,	\
PWR_INTF_SDIO_MSK  154 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  157 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  163 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  166 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  177 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  180 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  183 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  194 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  198 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK,				\
PWR_INTF_SDIO_MSK  207 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  210 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  213 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  224 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  227 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  236 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  247 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  251 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	 PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC,	\
PWR_INTF_SDIO_MSK  306 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  317 drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,	\
PWR_INTF_SDIO_MSK  266 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  370 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  374 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  378 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  382 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  465 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  469 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  478 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  481 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  484 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  490 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  493 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  501 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  504 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  507 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  515 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  519 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  528 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  531 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  534 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  542 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  545 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  554 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  562 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  566 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	 PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,\
PWR_INTF_SDIO_MSK  615 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK  623 drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,\
PWR_INTF_SDIO_MSK   34 drivers/staging/rtl8723bs/hal/sdio_halinit.c 		ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723B_card_enable_flow);
PWR_INTF_SDIO_MSK 1032 drivers/staging/rtl8723bs/hal/sdio_halinit.c 	ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723B_enter_lps_flow);
PWR_INTF_SDIO_MSK 1065 drivers/staging/rtl8723bs/hal/sdio_halinit.c 	ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723B_card_disable_flow);
PWR_INTF_SDIO_MSK   44 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/   \
PWR_INTF_SDIO_MSK   45 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/	\
PWR_INTF_SDIO_MSK   46 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/   \
PWR_INTF_SDIO_MSK   47 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital , 1:isolation*/   \
PWR_INTF_SDIO_MSK   76 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital , 1:isolation*/   \
PWR_INTF_SDIO_MSK   77 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\
PWR_INTF_SDIO_MSK   84 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/	\
PWR_INTF_SDIO_MSK   85 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/   \
PWR_INTF_SDIO_MSK   86 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/   \
PWR_INTF_SDIO_MSK   88 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/	\
PWR_INTF_SDIO_MSK   89 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
PWR_INTF_SDIO_MSK   95 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/	\
PWR_INTF_SDIO_MSK   96 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
PWR_INTF_SDIO_MSK   97 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/   \
PWR_INTF_SDIO_MSK  103 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/	\
PWR_INTF_SDIO_MSK  104 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/	\
PWR_INTF_SDIO_MSK  107 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/   \
PWR_INTF_SDIO_MSK  108 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/	\
PWR_INTF_SDIO_MSK  109 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
PWR_INTF_SDIO_MSK  115 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/	\
PWR_INTF_SDIO_MSK  116 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
PWR_INTF_SDIO_MSK  119 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/   \
PWR_INTF_SDIO_MSK  126 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/   \
PWR_INTF_SDIO_MSK  127 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/   \
PWR_INTF_SDIO_MSK  150 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/	\
PWR_INTF_SDIO_MSK  157 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
PWR_INTF_SDIO_MSK  173 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/	\
PWR_INTF_SDIO_MSK  174 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/	\
PWR_INTF_SDIO_MSK  175 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/	\
PWR_INTF_SDIO_MSK  176 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/	\
PWR_INTF_SDIO_MSK  177 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/	\
PWR_INTF_SDIO_MSK  178 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/	\
PWR_INTF_SDIO_MSK  179 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/	\
PWR_INTF_SDIO_MSK  180 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/	\
PWR_INTF_SDIO_MSK  181 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/	\
PWR_INTF_SDIO_MSK  182 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/	\
PWR_INTF_SDIO_MSK  183 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/	\
PWR_INTF_SDIO_MSK  184 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/	\
PWR_INTF_SDIO_MSK  185 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/	\
PWR_INTF_SDIO_MSK  186 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/	\
PWR_INTF_SDIO_MSK  187 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */	\
PWR_INTF_SDIO_MSK  188 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */	\
PWR_INTF_SDIO_MSK  189 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\
PWR_INTF_SDIO_MSK  190 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\
PWR_INTF_SDIO_MSK  191 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\
PWR_INTF_SDIO_MSK  192 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\
PWR_INTF_SDIO_MSK  193 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/	\
PWR_INTF_SDIO_MSK  194 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */
PWR_INTF_SDIO_MSK  200 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\
PWR_INTF_SDIO_MSK  201 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\
PWR_INTF_SDIO_MSK  202 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*.	0x101[1] = 1, enable security engine*/\
PWR_INTF_SDIO_MSK  203 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*.	0x100[7:0] = 0xFF	 enable WMAC TRX*/\
PWR_INTF_SDIO_MSK  204 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*.	reset MAC rx state machine*/\
PWR_INTF_SDIO_MSK  205 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*.	reset MAC rx state machine*/\
PWR_INTF_SDIO_MSK  206 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/	\
PWR_INTF_SDIO_MSK  207 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/	\
PWR_INTF_SDIO_MSK  208 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/	\
PWR_INTF_SDIO_MSK  209 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/	\
PWR_INTF_SDIO_MSK  210 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/	\
PWR_INTF_SDIO_MSK  211 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */	\
PWR_INTF_SDIO_MSK  212 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */	\
PWR_INTF_SDIO_MSK  213 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*.	0x02[1:0] = 2b'11	 enable BB macro*/\
PWR_INTF_SDIO_MSK  214 drivers/staging/rtl8723bs/include/hal_pwr_seq.h 	{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*.	0x522 = 0*/