PWRSTS_OFF_RET 148 arch/arm/mach-omap2/powerdomain.c if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) && PWRSTS_OFF_RET 155 arch/arm/mach-omap2/powerdomain.c if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) && PWRSTS_OFF_RET 38 arch/arm/mach-omap2/powerdomain.h #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON) PWRSTS_OFF_RET 45 arch/arm/mach-omap2/powerdomains2xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 63 arch/arm/mach-omap2/powerdomains2xxx_data.c [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ PWRSTS_OFF_RET 64 arch/arm/mach-omap2/powerdomains2xxx_data.c [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ PWRSTS_OFF_RET 65 arch/arm/mach-omap2/powerdomains2xxx_data.c [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */ PWRSTS_OFF_RET 31 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 48 arch/arm/mach-omap2/powerdomains33xx_data.c [0] = PWRSTS_OFF_RET, /* gfx_mem */ PWRSTS_OFF_RET 82 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 107 arch/arm/mach-omap2/powerdomains33xx_data.c [0] = PWRSTS_OFF_RET, /* pruss_mem */ PWRSTS_OFF_RET 108 arch/arm/mach-omap2/powerdomains33xx_data.c [1] = PWRSTS_OFF_RET, /* per_mem */ PWRSTS_OFF_RET 109 arch/arm/mach-omap2/powerdomains33xx_data.c [2] = PWRSTS_OFF_RET, /* ram_mem */ PWRSTS_OFF_RET 125 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 150 arch/arm/mach-omap2/powerdomains33xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l1 */ PWRSTS_OFF_RET 151 arch/arm/mach-omap2/powerdomains33xx_data.c [1] = PWRSTS_OFF_RET, /* mpu_l2 */ PWRSTS_OFF_RET 152 arch/arm/mach-omap2/powerdomains33xx_data.c [2] = PWRSTS_OFF_RET, /* mpu_ram */ PWRSTS_OFF_RET 36 arch/arm/mach-omap2/powerdomains3xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 39 arch/arm/mach-omap2/powerdomains3xxx_data.c [0] = PWRSTS_OFF_RET, PWRSTS_OFF_RET 40 arch/arm/mach-omap2/powerdomains3xxx_data.c [1] = PWRSTS_OFF_RET, PWRSTS_OFF_RET 41 arch/arm/mach-omap2/powerdomains3xxx_data.c [2] = PWRSTS_OFF_RET, PWRSTS_OFF_RET 42 arch/arm/mach-omap2/powerdomains3xxx_data.c [3] = PWRSTS_OFF_RET, PWRSTS_OFF_RET 57 arch/arm/mach-omap2/powerdomains3xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 61 arch/arm/mach-omap2/powerdomains3xxx_data.c [0] = PWRSTS_OFF_RET, PWRSTS_OFF_RET 99 arch/arm/mach-omap2/powerdomains3xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 102 arch/arm/mach-omap2/powerdomains3xxx_data.c [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ PWRSTS_OFF_RET 103 arch/arm/mach-omap2/powerdomains3xxx_data.c [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ PWRSTS_OFF_RET 116 arch/arm/mach-omap2/powerdomains3xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 124 arch/arm/mach-omap2/powerdomains3xxx_data.c [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ PWRSTS_OFF_RET 125 arch/arm/mach-omap2/powerdomains3xxx_data.c [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ PWRSTS_OFF_RET 236 arch/arm/mach-omap2/powerdomains3xxx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 36 arch/arm/mach-omap2/powerdomains43xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 39 arch/arm/mach-omap2/powerdomains43xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l1 */ PWRSTS_OFF_RET 40 arch/arm/mach-omap2/powerdomains43xx_data.c [1] = PWRSTS_OFF_RET, /* mpu_l2 */ PWRSTS_OFF_RET 41 arch/arm/mach-omap2/powerdomains43xx_data.c [2] = PWRSTS_OFF_RET, /* mpu_ram */ PWRSTS_OFF_RET 94 arch/arm/mach-omap2/powerdomains43xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 97 arch/arm/mach-omap2/powerdomains43xx_data.c [0] = PWRSTS_OFF_RET, /* icss_mem */ PWRSTS_OFF_RET 98 arch/arm/mach-omap2/powerdomains43xx_data.c [1] = PWRSTS_OFF_RET, /* per_mem */ PWRSTS_OFF_RET 99 arch/arm/mach-omap2/powerdomains43xx_data.c [2] = PWRSTS_OFF_RET, /* ram1_mem */ PWRSTS_OFF_RET 100 arch/arm/mach-omap2/powerdomains43xx_data.c [3] = PWRSTS_OFF_RET, /* ram2_mem */ PWRSTS_OFF_RET 37 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 43 arch/arm/mach-omap2/powerdomains44xx_data.c [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ PWRSTS_OFF_RET 44 arch/arm/mach-omap2/powerdomains44xx_data.c [4] = PWRSTS_OFF_RET, /* ducati_unicache */ PWRSTS_OFF_RET 118 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 122 arch/arm/mach-omap2/powerdomains44xx_data.c [1] = PWRSTS_OFF_RET, /* tesla_l1 */ PWRSTS_OFF_RET 123 arch/arm/mach-omap2/powerdomains44xx_data.c [2] = PWRSTS_OFF_RET, /* tesla_l2 */ PWRSTS_OFF_RET 156 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 159 arch/arm/mach-omap2/powerdomains44xx_data.c [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ PWRSTS_OFF_RET 173 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 176 arch/arm/mach-omap2/powerdomains44xx_data.c [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ PWRSTS_OFF_RET 206 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 209 arch/arm/mach-omap2/powerdomains44xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l1 */ PWRSTS_OFF_RET 210 arch/arm/mach-omap2/powerdomains44xx_data.c [1] = PWRSTS_OFF_RET, /* mpu_l2 */ PWRSTS_OFF_RET 231 arch/arm/mach-omap2/powerdomains44xx_data.c [1] = PWRSTS_OFF_RET, /* sl2_mem */ PWRSTS_OFF_RET 232 arch/arm/mach-omap2/powerdomains44xx_data.c [2] = PWRSTS_OFF_RET, /* tcm1_mem */ PWRSTS_OFF_RET 233 arch/arm/mach-omap2/powerdomains44xx_data.c [3] = PWRSTS_OFF_RET, /* tcm2_mem */ PWRSTS_OFF_RET 268 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 286 arch/arm/mach-omap2/powerdomains44xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 38 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* core_nret_bank */ PWRSTS_OFF_RET 39 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* core_ocmram */ PWRSTS_OFF_RET 40 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* core_other_bank */ PWRSTS_OFF_RET 41 arch/arm/mach-omap2/powerdomains54xx_data.c [3] = PWRSTS_OFF_RET, /* ipu_l2ram */ PWRSTS_OFF_RET 42 arch/arm/mach-omap2/powerdomains54xx_data.c [4] = PWRSTS_OFF_RET, /* ipu_unicache */ PWRSTS_OFF_RET 45 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* core_nret_bank */ PWRSTS_OFF_RET 46 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* core_ocmram */ PWRSTS_OFF_RET 47 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* core_other_bank */ PWRSTS_OFF_RET 48 arch/arm/mach-omap2/powerdomains54xx_data.c [3] = PWRSTS_OFF_RET, /* ipu_l2ram */ PWRSTS_OFF_RET 49 arch/arm/mach-omap2/powerdomains54xx_data.c [4] = PWRSTS_OFF_RET, /* ipu_unicache */ PWRSTS_OFF_RET 64 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* aessmem */ PWRSTS_OFF_RET 65 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* periphmem */ PWRSTS_OFF_RET 68 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* aessmem */ PWRSTS_OFF_RET 69 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* periphmem */ PWRSTS_OFF_RET 93 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* dss_mem */ PWRSTS_OFF_RET 96 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* dss_mem */ PWRSTS_OFF_RET 111 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ PWRSTS_OFF_RET 128 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ PWRSTS_OFF_RET 144 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* emu_bank */ PWRSTS_OFF_RET 147 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* emu_bank */ PWRSTS_OFF_RET 161 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l2 */ PWRSTS_OFF_RET 165 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l2 */ PWRSTS_OFF_RET 166 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* mpu_ram */ PWRSTS_OFF_RET 187 arch/arm/mach-omap2/powerdomains54xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 190 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* dsp_edma */ PWRSTS_OFF_RET 191 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* dsp_l1 */ PWRSTS_OFF_RET 192 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* dsp_l2 */ PWRSTS_OFF_RET 195 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* dsp_edma */ PWRSTS_OFF_RET 196 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* dsp_l1 */ PWRSTS_OFF_RET 197 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* dsp_l2 */ PWRSTS_OFF_RET 211 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* cam_mem */ PWRSTS_OFF_RET 214 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* cam_mem */ PWRSTS_OFF_RET 226 arch/arm/mach-omap2/powerdomains54xx_data.c .pwrsts_logic_ret = PWRSTS_OFF_RET, PWRSTS_OFF_RET 229 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* l3init_bank1 */ PWRSTS_OFF_RET 230 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* l3init_bank2 */ PWRSTS_OFF_RET 233 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* l3init_bank1 */ PWRSTS_OFF_RET 234 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* l3init_bank2 */ PWRSTS_OFF_RET 248 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* gpu_mem */ PWRSTS_OFF_RET 251 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* gpu_mem */ PWRSTS_OFF_RET 281 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* hwa_mem */ PWRSTS_OFF_RET 282 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* sl2_mem */ PWRSTS_OFF_RET 283 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* tcm1_mem */ PWRSTS_OFF_RET 284 arch/arm/mach-omap2/powerdomains54xx_data.c [3] = PWRSTS_OFF_RET, /* tcm2_mem */ PWRSTS_OFF_RET 287 arch/arm/mach-omap2/powerdomains54xx_data.c [0] = PWRSTS_OFF_RET, /* hwa_mem */ PWRSTS_OFF_RET 288 arch/arm/mach-omap2/powerdomains54xx_data.c [1] = PWRSTS_OFF_RET, /* sl2_mem */ PWRSTS_OFF_RET 289 arch/arm/mach-omap2/powerdomains54xx_data.c [2] = PWRSTS_OFF_RET, /* tcm1_mem */ PWRSTS_OFF_RET 290 arch/arm/mach-omap2/powerdomains54xx_data.c [3] = PWRSTS_OFF_RET, /* tcm2_mem */ PWRSTS_OFF_RET 172 arch/arm/mach-omap2/powerdomains7xx_data.c [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ PWRSTS_OFF_RET 188 arch/arm/mach-omap2/powerdomains7xx_data.c [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ PWRSTS_OFF_RET 217 arch/arm/mach-omap2/powerdomains7xx_data.c [0] = PWRSTS_OFF_RET, /* mpu_l2 */