PWRDM_POWER_RET 72 arch/arm/mach-omap2/cpuidle34xx.c .per_min_state = PWRDM_POWER_RET, PWRDM_POWER_RET 75 arch/arm/mach-omap2/cpuidle34xx.c .mpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 77 arch/arm/mach-omap2/cpuidle34xx.c .per_min_state = PWRDM_POWER_RET, PWRDM_POWER_RET 82 arch/arm/mach-omap2/cpuidle34xx.c .per_min_state = PWRDM_POWER_RET, PWRDM_POWER_RET 85 arch/arm/mach-omap2/cpuidle34xx.c .mpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 86 arch/arm/mach-omap2/cpuidle34xx.c .core_state = PWRDM_POWER_RET, PWRDM_POWER_RET 91 arch/arm/mach-omap2/cpuidle34xx.c .core_state = PWRDM_POWER_RET, PWRDM_POWER_RET 168 arch/arm/mach-omap2/cpuidle34xx.c u32 mpu_deepest_state = PWRDM_POWER_RET; PWRDM_POWER_RET 169 arch/arm/mach-omap2/cpuidle34xx.c u32 core_deepest_state = PWRDM_POWER_RET; PWRDM_POWER_RET 38 arch/arm/mach-omap2/cpuidle44xx.c .mpu_logic_state = PWRDM_POWER_RET, PWRDM_POWER_RET 42 arch/arm/mach-omap2/cpuidle44xx.c .mpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 43 arch/arm/mach-omap2/cpuidle44xx.c .mpu_logic_state = PWRDM_POWER_RET, PWRDM_POWER_RET 47 arch/arm/mach-omap2/cpuidle44xx.c .mpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 59 arch/arm/mach-omap2/cpuidle44xx.c .cpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 60 arch/arm/mach-omap2/cpuidle44xx.c .mpu_state = PWRDM_POWER_RET, PWRDM_POWER_RET 61 arch/arm/mach-omap2/cpuidle44xx.c .mpu_logic_state = PWRDM_POWER_RET, PWRDM_POWER_RET 149 arch/arm/mach-omap2/cpuidle44xx.c mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && PWRDM_POWER_RET 37 arch/arm/mach-omap2/omap-iommu.c if (*pwrst > PWRDM_POWER_RET) PWRDM_POWER_RET 135 arch/arm/mach-omap2/omap-mpuss-lowpower.c case PWRDM_POWER_RET: PWRDM_POWER_RET 229 arch/arm/mach-omap2/omap-mpuss-lowpower.c unsigned int save_state = 0, cpu_logic_state = PWRDM_POWER_RET; PWRDM_POWER_RET 244 arch/arm/mach-omap2/omap-mpuss-lowpower.c case PWRDM_POWER_RET: PWRDM_POWER_RET 266 arch/arm/mach-omap2/omap-mpuss-lowpower.c if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) && PWRDM_POWER_RET 79 arch/arm/mach-omap2/pm24xx.c pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 80 arch/arm/mach-omap2/pm24xx.c pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 146 arch/arm/mach-omap2/pm24xx.c pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 204 arch/arm/mach-omap2/pm24xx.c pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET); PWRDM_POWER_RET 206 arch/arm/mach-omap2/pm24xx.c pwrdm_set_logic_retst(core_pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 208 arch/arm/mach-omap2/pm24xx.c pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 201 arch/arm/mach-omap2/pm34xx.c case PWRDM_POWER_RET: PWRDM_POWER_RET 365 arch/arm/mach-omap2/pm34xx.c state = PWRDM_POWER_RET; PWRDM_POWER_RET 371 arch/arm/mach-omap2/pm34xx.c pwrst->next_state = PWRDM_POWER_RET; PWRDM_POWER_RET 416 arch/arm/mach-omap2/pm34xx.c pwrst->next_state = PWRDM_POWER_RET; PWRDM_POWER_RET 127 arch/arm/mach-omap2/pm44xx.c cpu_suspend_state = PWRDM_POWER_RET; PWRDM_POWER_RET 142 arch/arm/mach-omap2/pm44xx.c pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_RET); PWRDM_POWER_RET 150 arch/arm/mach-omap2/pm44xx.c PWRDM_POWER_RET); PWRDM_POWER_RET 179 arch/arm/mach-omap2/powerdomain.c if (prev == PWRDM_POWER_RET) PWRDM_POWER_RET 1048 arch/arm/mach-omap2/powerdomain.c u8 default_pwrst = is_logic_state ? PWRDM_POWER_RET : PWRDM_POWER_ON; PWRDM_POWER_RET 32 arch/arm/mach-omap2/powerdomain.h #define PWRSTS_RET (1 << PWRDM_POWER_RET) PWRDM_POWER_RET 88 arch/arm/mach-omap2/prm2xxx.c pwrst = PWRDM_POWER_RET; PWRDM_POWER_RET 157 arch/arm/mach-omap2/prm2xxx.c case PWRDM_POWER_RET: PWRDM_POWER_RET 576 arch/arm/mach-omap2/prm44xx.c if (state != PWRDM_POWER_RET) PWRDM_POWER_RET 577 arch/arm/mach-omap2/prm44xx.c return PWRDM_POWER_RET; PWRDM_POWER_RET 633 arch/arm/mach-omap2/prm44xx.c if (state != PWRDM_POWER_RET) PWRDM_POWER_RET 634 arch/arm/mach-omap2/prm44xx.c return PWRDM_POWER_RET; PWRDM_POWER_RET 257 arch/arm/mach-omap2/vc.c case PWRDM_POWER_RET: