PUNIT_REG_DSPSSPM  476 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
PUNIT_REG_DSPSSPM  558 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
PUNIT_REG_DSPSSPM  561 drivers/gpu/drm/i915/display/intel_cdclk.c 	vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val);
PUNIT_REG_DSPSSPM  562 drivers/gpu/drm/i915/display/intel_cdclk.c 	if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) &
PUNIT_REG_DSPSSPM  640 drivers/gpu/drm/i915/display/intel_cdclk.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
PUNIT_REG_DSPSSPM  643 drivers/gpu/drm/i915/display/intel_cdclk.c 	vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val);
PUNIT_REG_DSPSSPM  644 drivers/gpu/drm/i915/display/intel_cdclk.c 	if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) &
PUNIT_REG_DSPSSPM 1617 drivers/gpu/drm/i915/display/intel_display_power.c 	state = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe);
PUNIT_REG_DSPSSPM 1629 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSC_MASK(pipe);
PUNIT_REG_DSPSSPM 1650 drivers/gpu/drm/i915/display/intel_display_power.c 	((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe)) == state)
PUNIT_REG_DSPSSPM 1655 drivers/gpu/drm/i915/display/intel_display_power.c 	ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
PUNIT_REG_DSPSSPM 1658 drivers/gpu/drm/i915/display/intel_display_power.c 	vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, ctrl);
PUNIT_REG_DSPSSPM 1663 drivers/gpu/drm/i915/display/intel_display_power.c 			  vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM));
PUNIT_REG_DSPSSPM  357 drivers/gpu/drm/i915/intel_pm.c 	val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
PUNIT_REG_DSPSSPM  362 drivers/gpu/drm/i915/intel_pm.c 	vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val);
PUNIT_REG_DSPSSPM 6140 drivers/gpu/drm/i915/intel_pm.c 		val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);