PSR_I_BIT 102 arch/arm/include/asm/assembler.h msr cpsr_c, #PSR_I_BIT | SVC_MODE PSR_I_BIT 182 arch/arm/include/asm/assembler.h tst \oldcpsr, #PSR_I_BIT PSR_I_BIT 349 arch/arm/include/asm/assembler.h orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE PSR_I_BIT 364 arch/arm/include/asm/assembler.h setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg PSR_I_BIT 36 arch/arm/include/asm/efi.h (PSR_J_BIT | PSR_E_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | \ PSR_I_BIT 19 arch/arm/include/asm/irqflags.h #define IRQMASK_I_BIT PSR_I_BIT PSR_I_BIT 23 arch/arm/include/asm/kvm_emulate.h #define PSR_AA32_I_BIT PSR_I_BIT PSR_I_BIT 49 arch/arm/include/asm/ptrace.h (!((regs)->ARM_cpsr & PSR_I_BIT)) PSR_I_BIT 67 arch/arm/include/asm/ptrace.h if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { PSR_I_BIT 570 arch/arm/kernel/setup.c PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), PSR_I_BIT 572 arch/arm/kernel/setup.c PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE), PSR_I_BIT 574 arch/arm/kernel/setup.c PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE), PSR_I_BIT 576 arch/arm/kernel/setup.c PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE), PSR_I_BIT 578 arch/arm/kernel/setup.c PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) PSR_I_BIT 26 arch/arm/kvm/reset.c .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, PSR_I_BIT 1147 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr |= PSR_I_BIT; PSR_I_BIT 1235 arch/arm/probes/kprobes/test-core.c regs->ARM_cpsr &= ~PSR_I_BIT; PSR_I_BIT 45 arch/arm64/include/asm/assembler.h and \tmp, \pstate, #(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) PSR_I_BIT 14 arch/arm64/include/asm/daifflags.h #define DAIF_PROCCTX_NOIRQ PSR_I_BIT PSR_I_BIT 15 arch/arm64/include/asm/daifflags.h #define DAIF_ERRCTX (PSR_I_BIT | PSR_A_BIT) PSR_I_BIT 16 arch/arm64/include/asm/daifflags.h #define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) PSR_I_BIT 48 arch/arm64/include/asm/daifflags.h flags |= PSR_I_BIT; PSR_I_BIT 67 arch/arm64/include/asm/daifflags.h bool irq_disabled = flags & PSR_I_BIT; PSR_I_BIT 70 arch/arm64/include/asm/daifflags.h !(read_sysreg(daif) & PSR_I_BIT)); PSR_I_BIT 87 arch/arm64/include/asm/daifflags.h flags &= ~PSR_I_BIT; PSR_I_BIT 45 arch/arm64/include/asm/efi.h #define ARCH_EFI_IRQ_FLAGS_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) PSR_I_BIT 87 arch/arm64/include/asm/irqflags.h "and %w0, %w1, #" __stringify(PSR_I_BIT), PSR_I_BIT 222 arch/arm64/include/asm/ptrace.h (!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs)) PSR_I_BIT 183 arch/arm64/kernel/probes/kprobes.c regs->pstate |= PSR_I_BIT; PSR_I_BIT 83 arch/arm64/kernel/process.c write_sysreg(daif_bits | PSR_I_BIT, daif); PSR_I_BIT 238 arch/arm64/kernel/process.c pstate & PSR_I_BIT ? 'I' : 'i', PSR_I_BIT 1921 arch/arm64/kernel/ptrace.c (regs->pstate & PSR_I_BIT) == 0 && PSR_I_BIT 184 arch/arm64/kernel/smp.c WARN_ON(!(cpuflags & PSR_I_BIT)); PSR_I_BIT 105 arch/arm64/kvm/inject_fault.c new |= PSR_I_BIT; PSR_I_BIT 40 arch/arm64/kvm/reset.c .regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | PSR_I_BIT 43 arch/unicore32/include/asm/assembler.h or \temp, \temp, #PSR_I_BIT | PRIV_MODE PSR_I_BIT 16 arch/unicore32/include/asm/irqflags.h #define ARCH_IRQ_DISABLED (PRIV_MODE | PSR_I_BIT) PSR_I_BIT 23 arch/unicore32/include/asm/ptrace.h (!((regs)->UCreg_asr & PSR_I_BIT)) PSR_I_BIT 40 arch/unicore32/include/asm/ptrace.h if ((regs->UCreg_asr & PSR_I_BIT) == 0) { PSR_I_BIT 120 arch/unicore32/kernel/setup.c "r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE), PSR_I_BIT 122 arch/unicore32/kernel/setup.c "r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE), PSR_I_BIT 124 arch/unicore32/kernel/setup.c "r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE), PSR_I_BIT 126 arch/unicore32/kernel/setup.c "r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE)