PSEC_TO_NSEC      905 drivers/mtd/nand/raw/meson_nand.c 		delay_idle = DIV_ROUND_UP(PSEC_TO_NSEC(instr->delay_ns),
PSEC_TO_NSEC     1116 drivers/mtd/nand/raw/meson_nand.c 	meson_chip->twb = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tWB_max),
PSEC_TO_NSEC     1118 drivers/mtd/nand/raw/meson_nand.c 	meson_chip->tadl = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tADL_min),
PSEC_TO_NSEC     1120 drivers/mtd/nand/raw/meson_nand.c 	tbers_clocks = DIV_ROUND_UP_ULL(PSEC_TO_NSEC(timings->tBERS_max),
PSEC_TO_NSEC      680 drivers/mtd/nand/raw/nand_base.c 	ndelay(PSEC_TO_NSEC(timings->tWB_max));
PSEC_TO_NSEC     1022 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_ADDR(3, addrs, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1024 drivers/mtd/nand/raw/nand_base.c 				 PSEC_TO_NSEC(sdr->tRR_min)),
PSEC_TO_NSEC     1065 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_CMD(NAND_CMD_READSTART, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1067 drivers/mtd/nand/raw/nand_base.c 				 PSEC_TO_NSEC(sdr->tRR_min)),
PSEC_TO_NSEC     1160 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1162 drivers/mtd/nand/raw/nand_base.c 					 PSEC_TO_NSEC(sdr->tRR_min)),
PSEC_TO_NSEC     1218 drivers/mtd/nand/raw/nand_base.c 				    PSEC_TO_NSEC(sdr->tCCS_min)),
PSEC_TO_NSEC     1298 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_ADDR(0, addrs, PSEC_TO_NSEC(sdr->tADL_min)),
PSEC_TO_NSEC     1300 drivers/mtd/nand/raw/nand_base.c 		NAND_OP_CMD(NAND_CMD_PAGEPROG, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1414 drivers/mtd/nand/raw/nand_base.c 				    PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1522 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(2, addrs, PSEC_TO_NSEC(sdr->tCCS_min)),
PSEC_TO_NSEC     1576 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)),
PSEC_TO_NSEC     1615 drivers/mtd/nand/raw/nand_base.c 				    PSEC_TO_NSEC(sdr->tADL_min)),
PSEC_TO_NSEC     1743 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)),
PSEC_TO_NSEC     1745 drivers/mtd/nand/raw/nand_base.c 					      PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1790 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1792 drivers/mtd/nand/raw/nand_base.c 					 PSEC_TO_NSEC(sdr->tRR_min)),
PSEC_TO_NSEC     1814 drivers/mtd/nand/raw/nand_base.c 					 PSEC_TO_NSEC(delay_ns)),
PSEC_TO_NSEC     1846 drivers/mtd/nand/raw/nand_base.c 			NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)),
PSEC_TO_NSEC     1348 drivers/mtd/nand/raw/stm32_fmc2_nand.c 	ndelay(PSEC_TO_NSEC(timings->tWB_max));