PP_STATUS 431 drivers/gpu/drm/gma500/cdv_intel_dp.c if (wait_for(((REG_READ(PP_STATUS) & idle_on_mask) == idle_on_mask), 1000)) { PP_STATUS 432 drivers/gpu/drm/gma500/cdv_intel_dp.c DRM_DEBUG_KMS("Error in Powering up eDP panel, status %x\n", REG_READ(PP_STATUS)); PP_STATUS 463 drivers/gpu/drm/gma500/cdv_intel_dp.c DRM_DEBUG_KMS("PP_STATUS %x\n", REG_READ(PP_STATUS)); PP_STATUS 465 drivers/gpu/drm/gma500/cdv_intel_dp.c if (wait_for((REG_READ(PP_STATUS) & idle_off_mask) == 0, 1000)) { PP_STATUS 199 drivers/gpu/drm/gma500/cdv_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 210 drivers/gpu/drm/gma500/cdv_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 265 drivers/gpu/drm/gma500/oaktrail_device.c pp_stat = PSB_RVDC32(PP_STATUS); PP_STATUS 375 drivers/gpu/drm/gma500/oaktrail_device.c pp_stat = PSB_RVDC32(PP_STATUS); PP_STATUS 380 drivers/gpu/drm/gma500/oaktrail_device.c pp_stat = PSB_RVDC32(PP_STATUS); PP_STATUS 47 drivers/gpu/drm/gma500/oaktrail_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 58 drivers/gpu/drm/gma500/oaktrail_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 222 drivers/gpu/drm/gma500/psb_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 233 drivers/gpu/drm/gma500/psb_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 322 drivers/gpu/drm/gma500/psb_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 328 drivers/gpu/drm/gma500/psb_intel_lvds.c pp_status = REG_READ(PP_STATUS); PP_STATUS 30 drivers/gpu/drm/gma500/psb_lid.c pp_status = REG_READ(PP_STATUS); PP_STATUS 34 drivers/gpu/drm/gma500/psb_lid.c if (REG_READ(PP_STATUS) & PP_ON) { PP_STATUS 46 drivers/gpu/drm/gma500/psb_lid.c pp_status = REG_READ(PP_STATUS); PP_STATUS 4261 drivers/gpu/drm/i915/display/intel_display_power.c I915_STATE_WARN(I915_READ(PP_STATUS(0)) & PP_ON, PP_STATUS 906 drivers/gpu/drm/i915/display/intel_dp.c return I915_READ(PP_STATUS(pipe)) & PP_ON; PP_STATUS 1035 drivers/gpu/drm/i915/display/intel_dp.c regs->pp_stat = PP_STATUS(pps_idx); PP_STATUS 321 drivers/gpu/drm/i915/display/intel_lvds.c if (intel_de_wait_for_set(dev_priv, PP_STATUS(0), PP_ON, 5000)) PP_STATUS 335 drivers/gpu/drm/i915/display/intel_lvds.c if (intel_de_wait_for_clear(dev_priv, PP_STATUS(0), PP_ON, 1000))