PPC476           3037 arch/powerpc/xmon/ppc-opc.c {"attn",	X(0,256),	X_MASK,	  POWER4|PPCA2,	PPC476|PPCVLE,	{0}},
PPC476           3523 arch/powerpc/xmon/ppc-opc.c {"udi0fcm.",	APU(4, 515,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3524 arch/powerpc/xmon/ppc-opc.c {"udi0fcm",	APU(4, 515,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3553 arch/powerpc/xmon/ppc-opc.c {"udi1fcm.",	APU(4, 547,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3554 arch/powerpc/xmon/ppc-opc.c {"udi1fcm",	APU(4, 547,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3593 arch/powerpc/xmon/ppc-opc.c {"udi2fcm.",	APU(4, 579,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3594 arch/powerpc/xmon/ppc-opc.c {"udi2fcm",	APU(4, 579,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3609 arch/powerpc/xmon/ppc-opc.c {"udi3fcm.",	APU(4, 611,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3611 arch/powerpc/xmon/ppc-opc.c {"udi3fcm",	APU(4, 611,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3635 arch/powerpc/xmon/ppc-opc.c {"udi4fcm.",	APU(4, 643,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3636 arch/powerpc/xmon/ppc-opc.c {"udi4fcm",	APU(4, 643,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3662 arch/powerpc/xmon/ppc-opc.c {"udi5fcm.",	APU(4, 675,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3663 arch/powerpc/xmon/ppc-opc.c {"udi5fcm",	APU(4, 675,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3694 arch/powerpc/xmon/ppc-opc.c {"udi6fcm.",	APU(4, 707,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3695 arch/powerpc/xmon/ppc-opc.c {"udi6fcm",	APU(4, 707,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3717 arch/powerpc/xmon/ppc-opc.c {"udi7fcm.",	APU(4, 739,0),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3718 arch/powerpc/xmon/ppc-opc.c {"udi7fcm",	APU(4, 739,1),	APU_MASK, PPC405|PPC440, PPC476,	{URT, URA, URB}},
PPC476           3751 arch/powerpc/xmon/ppc-opc.c {"udi8fcm.",	APU(4, 771,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3752 arch/powerpc/xmon/ppc-opc.c {"udi8fcm",	APU(4, 771,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3759 arch/powerpc/xmon/ppc-opc.c {"udi9fcm.",	APU(4, 804,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3760 arch/powerpc/xmon/ppc-opc.c {"udi9fcm",	APU(4, 804,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3767 arch/powerpc/xmon/ppc-opc.c {"udi10fcm.",	APU(4, 835,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3768 arch/powerpc/xmon/ppc-opc.c {"udi10fcm",	APU(4, 835,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3775 arch/powerpc/xmon/ppc-opc.c {"udi11fcm.",	APU(4, 867,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3777 arch/powerpc/xmon/ppc-opc.c {"udi11fcm",	APU(4, 867,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3784 arch/powerpc/xmon/ppc-opc.c {"udi12fcm.",	APU(4, 899,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3785 arch/powerpc/xmon/ppc-opc.c {"udi12fcm",	APU(4, 899,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3796 arch/powerpc/xmon/ppc-opc.c {"udi13fcm.",	APU(4, 931,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3797 arch/powerpc/xmon/ppc-opc.c {"udi13fcm",	APU(4, 931,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3806 arch/powerpc/xmon/ppc-opc.c {"udi14fcm.",	APU(4, 963,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3807 arch/powerpc/xmon/ppc-opc.c {"udi14fcm",	APU(4, 963,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3816 arch/powerpc/xmon/ppc-opc.c {"udi15fcm.",	APU(4, 995,0),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           3818 arch/powerpc/xmon/ppc-opc.c {"udi15fcm",	APU(4, 995,1),	APU_MASK,    PPC440,	PPC476,		{URT, URA, URB}},
PPC476           4380 arch/powerpc/xmon/ppc-opc.c {"rfmci",	X(19,38),    0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCVLE,	{0}},
PPC476           4384 arch/powerpc/xmon/ppc-opc.c {"rfci",	XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},
PPC476           4406 arch/powerpc/xmon/ppc-opc.c {"hrfid",	XL(19,274),    0xffffffff, POWER5|CELL, PPC476|PPCVLE,	{0}},
PPC476           4733 arch/powerpc/xmon/ppc-opc.c {"icbt",	X(31,22),  X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0,	{CT, RA0, RB}},
PPC476           4851 arch/powerpc/xmon/ppc-opc.c {"dcbfl",	XOPL(31,86,1),	XRT_MASK,    POWER5,	PPC476,		{RA0, RB}},
PPC476           4894 arch/powerpc/xmon/ppc-opc.c {"wrtee",	X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RS}},
PPC476           4896 arch/powerpc/xmon/ppc-opc.c {"dcbtstls",	X(31,134),	X_MASK, PPCCHLK|PPC476|TITAN, 0,	{CT, RA0, RB}},
PPC476           4940 arch/powerpc/xmon/ppc-opc.c {"prtyw",	X(31,154),    XRB_MASK, POWER6|PPCA2|PPC476, 0,		{RA, RS}},
PPC476           4946 arch/powerpc/xmon/ppc-opc.c {"wrteei",	X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{E}},
PPC476           4948 arch/powerpc/xmon/ppc-opc.c {"dcbtls",	X(31,166),	X_MASK,	 PPCCHLK|PPC476|TITAN, 0,	{CT, RA0, RB}},
PPC476           5020 arch/powerpc/xmon/ppc-opc.c {"icblc",	X(31,230),	X_MASK,	PPCCHLK|PPC476|TITAN, 0,	{CT, RA0, RB}},
PPC476           5066 arch/powerpc/xmon/ppc-opc.c {"mfdcrx",	X(31,259),	X_MASK, BOOKE|PPCA2|PPC476, TITAN,	{RS, RA}},
PPC476           5093 arch/powerpc/xmon/ppc-opc.c {"tlbiel",	X(31,274),	X_MASK|1<<20,POWER9,	PPC476,		{RB, RSO, RIC, PRS, X_R}},
PPC476           5094 arch/powerpc/xmon/ppc-opc.c {"tlbiel",	X(31,274),	XRTLRA_MASK, POWER4,	POWER9|PPC476,	{RB, LOPT}},
PPC476           5180 arch/powerpc/xmon/ppc-opc.c {"mfdcr",	X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
PPC476           5185 arch/powerpc/xmon/ppc-opc.c {"dcread",	X(31,326),	X_MASK,	  PPC476|TITAN,	0,		{RT, RA0, RB}},
PPC476           5429 arch/powerpc/xmon/ppc-opc.c {"mtdcrx",	X(31,387),	X_MASK,	     BOOKE|PPCA2|PPC476, TITAN,	{RA, RS}},
PPC476           5434 arch/powerpc/xmon/ppc-opc.c {"dcblc",	X(31,390),	X_MASK,	 PPCCHLK|PPC476|TITAN, 0,	{CT, RA0, RB}},
PPC476           5534 arch/powerpc/xmon/ppc-opc.c {"mtdcr",	X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
PPC476           5540 arch/powerpc/xmon/ppc-opc.c {"dci",		X(31,454),	XRARB_MASK, PPCA2|PPC476, 0,		{CT}},
PPC476           5726 arch/powerpc/xmon/ppc-opc.c {"dcread",	X(31,486),	X_MASK,	 PPC403|PPC440, PPCA2|PPC476,	{RT, RA0, RB}},
PPC476           5728 arch/powerpc/xmon/ppc-opc.c {"icbtls",	X(31,486),	X_MASK,	 PPCCHLK|PPC476|TITAN, 0,	{CT, RA0, RB}},
PPC476           5750 arch/powerpc/xmon/ppc-opc.c {"cmpb",	X(31,508),	X_MASK, POWER6|PPCA2|PPC476, 0,		{RA, RS, RB}},
PPC476           5845 arch/powerpc/xmon/ppc-opc.c {"hwsync",	XSYNC(31,598,0), 0xffffffff, POWER4,	BOOKE|PPC476,	{0}},
PPC476           5849 arch/powerpc/xmon/ppc-opc.c {"sync",	X(31,598),     XSYNC_MASK,   PPCCOM,	BOOKE|PPC476,	{LS}},
PPC476           5850 arch/powerpc/xmon/ppc-opc.c {"msync",	X(31,598),     0xffffffff, BOOKE|PPCA2|PPC476, 0,	{0}},
PPC476           5851 arch/powerpc/xmon/ppc-opc.c {"sync",	X(31,598),     0xffffffff,   BOOKE|PPC476, E6500,	{0}},
PPC476           6007 arch/powerpc/xmon/ppc-opc.c {"dcba",	X(31,758), XRT_MASK, PPC405|PPC7450|BOOKE|PPCA2|PPC476, 0, {RA0, RB}},
PPC476           6039 arch/powerpc/xmon/ppc-opc.c {"tlbivax",	X(31,786),	XRT_MASK, BOOKE|PPCA2|PPC476, 0,	{RA0, RB}},
PPC476           6105 arch/powerpc/xmon/ppc-opc.c {"eieio",	X(31,854),	0xffffffff,  PPC,   BOOKE|PPCA2|PPC476,	{0}},
PPC476           6106 arch/powerpc/xmon/ppc-opc.c {"mbar",	X(31,854),	X_MASK,	   BOOKE|PPCA2|PPC476, 0,	{MO}},
PPC476           6108 arch/powerpc/xmon/ppc-opc.c {"eieio",	X(31,854),	0xffffffff, PPCA2|PPC476, 0,		{0}},
PPC476           6110 arch/powerpc/xmon/ppc-opc.c {"lfiwax",	X(31,855),	X_MASK, POWER6|PPCA2|PPC476, 0,		{FRT, RA0, RB}},
PPC476           6150 arch/powerpc/xmon/ppc-opc.c {"tlbsx",	XRC(31,914,0),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
PPC476           6151 arch/powerpc/xmon/ppc-opc.c {"tlbsx.",	XRC(31,914,1),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
PPC476           6196 arch/powerpc/xmon/ppc-opc.c {"tlbre",	X(31,946),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},
PPC476           6214 arch/powerpc/xmon/ppc-opc.c {"ici",		X(31,966),	XRARB_MASK,  PPCA2|PPC476, 0,		{CT}},
PPC476           6225 arch/powerpc/xmon/ppc-opc.c {"tlbld",	X(31,978),	XRTRA_MASK,  PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
PPC476           6228 arch/powerpc/xmon/ppc-opc.c {"tlbwe",	X(31,978),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},
PPC476           6245 arch/powerpc/xmon/ppc-opc.c {"icread",	X(31,998),     XRT_MASK, PPC403|PPC440|PPC476|TITAN, 0,	{RA0, RB}},
PPC476           6269 arch/powerpc/xmon/ppc-opc.c {"dcbzl",	XOPL(31,1014,1), XRT_MASK,   POWER4|E500MC, PPC476,	{RA0, RB}},
PPC476           6338 arch/powerpc/xmon/ppc-opc.c {"lq",		OP(56),		OP_MASK,     POWER4,	PPC476|PPCVLE,	{RTQ, DQ, RAQ}},
PPC476           6675 arch/powerpc/xmon/ppc-opc.c {"stq",		DSO(62,2),	DS_MASK,     POWER4,	PPC476|PPCVLE,	{RSQ, DS, RA0}},
PPC476           6691 arch/powerpc/xmon/ppc-opc.c {"fcpsgn",	XRC(63,8,0),	X_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FRT, FRA, FRB}},
PPC476           6692 arch/powerpc/xmon/ppc-opc.c {"fcpsgn.",	XRC(63,8,1),	X_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FRT, FRA, FRB}},
PPC476           6810 arch/powerpc/xmon/ppc-opc.c {"mtfsfi",  XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCVLE, {BFF, U, W}},
PPC476           6811 arch/powerpc/xmon/ppc-opc.c {"mtfsfi",  XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476|PPCVLE, {BFF, U}},
PPC476           6812 arch/powerpc/xmon/ppc-opc.c {"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCVLE, {BFF, U, W}},
PPC476           6813 arch/powerpc/xmon/ppc-opc.c {"mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476|PPCVLE, {BFF, U}},
PPC476           6905 arch/powerpc/xmon/ppc-opc.c {"mtfsf",	XFL(63,711,0),	XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FLM, FRB, XFL_L, W}},
PPC476           6906 arch/powerpc/xmon/ppc-opc.c {"mtfsf",	XFL(63,711,0),	XFL_MASK,    COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}},
PPC476           6907 arch/powerpc/xmon/ppc-opc.c {"mtfsf.",	XFL(63,711,1),	XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE,	{FLM, FRB, XFL_L, W}},
PPC476           6908 arch/powerpc/xmon/ppc-opc.c {"mtfsf.",	XFL(63,711,1),	XFL_MASK,    COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}},
PPC476           6925 arch/powerpc/xmon/ppc-opc.c {"fctid",	XRC(63,814,0),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},
PPC476           6927 arch/powerpc/xmon/ppc-opc.c {"fctid.",	XRC(63,814,1),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},
PPC476           6930 arch/powerpc/xmon/ppc-opc.c {"fctidz",	XRC(63,815,0),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},
PPC476           6932 arch/powerpc/xmon/ppc-opc.c {"fctidz.",	XRC(63,815,1),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},
PPC476           6950 arch/powerpc/xmon/ppc-opc.c {"fcfid",	XRC(63,846,0),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},
PPC476           6952 arch/powerpc/xmon/ppc-opc.c {"fcfid.",	XRC(63,846,1),	XRA_MASK,    PPC476,	PPCVLE,		{FRT, FRB}},