PPC403 4384 arch/powerpc/xmon/ppc-opc.c {"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}}, PPC403 4842 arch/powerpc/xmon/ppc-opc.c {"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}}, PPC403 4843 arch/powerpc/xmon/ppc-opc.c {"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}}, PPC403 4894 arch/powerpc/xmon/ppc-opc.c {"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RS}}, PPC403 4946 arch/powerpc/xmon/ppc-opc.c {"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {E}}, PPC403 5071 arch/powerpc/xmon/ppc-opc.c {"icbt", X(31,262), XRT_MASK, PPC403, 0, {RA, RB}}, PPC403 5146 arch/powerpc/xmon/ppc-opc.c {"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5147 arch/powerpc/xmon/ppc-opc.c {"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5148 arch/powerpc/xmon/ppc-opc.c {"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5149 arch/powerpc/xmon/ppc-opc.c {"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5150 arch/powerpc/xmon/ppc-opc.c {"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5151 arch/powerpc/xmon/ppc-opc.c {"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5152 arch/powerpc/xmon/ppc-opc.c {"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5153 arch/powerpc/xmon/ppc-opc.c {"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5154 arch/powerpc/xmon/ppc-opc.c {"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5155 arch/powerpc/xmon/ppc-opc.c {"mfbr7", XSPR(31,323,135), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5156 arch/powerpc/xmon/ppc-opc.c {"mfbear", XSPR(31,323,144), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5157 arch/powerpc/xmon/ppc-opc.c {"mfbesr", XSPR(31,323,145), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5158 arch/powerpc/xmon/ppc-opc.c {"mfiocr", XSPR(31,323,160), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5159 arch/powerpc/xmon/ppc-opc.c {"mfdmacr0", XSPR(31,323,192), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5160 arch/powerpc/xmon/ppc-opc.c {"mfdmact0", XSPR(31,323,193), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5161 arch/powerpc/xmon/ppc-opc.c {"mfdmada0", XSPR(31,323,194), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5162 arch/powerpc/xmon/ppc-opc.c {"mfdmasa0", XSPR(31,323,195), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5163 arch/powerpc/xmon/ppc-opc.c {"mfdmacc0", XSPR(31,323,196), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5164 arch/powerpc/xmon/ppc-opc.c {"mfdmacr1", XSPR(31,323,200), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5165 arch/powerpc/xmon/ppc-opc.c {"mfdmact1", XSPR(31,323,201), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5166 arch/powerpc/xmon/ppc-opc.c {"mfdmada1", XSPR(31,323,202), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5167 arch/powerpc/xmon/ppc-opc.c {"mfdmasa1", XSPR(31,323,203), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5168 arch/powerpc/xmon/ppc-opc.c {"mfdmacc1", XSPR(31,323,204), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5169 arch/powerpc/xmon/ppc-opc.c {"mfdmacr2", XSPR(31,323,208), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5170 arch/powerpc/xmon/ppc-opc.c {"mfdmact2", XSPR(31,323,209), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5171 arch/powerpc/xmon/ppc-opc.c {"mfdmada2", XSPR(31,323,210), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5172 arch/powerpc/xmon/ppc-opc.c {"mfdmasa2", XSPR(31,323,211), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5173 arch/powerpc/xmon/ppc-opc.c {"mfdmacc2", XSPR(31,323,212), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5174 arch/powerpc/xmon/ppc-opc.c {"mfdmacr3", XSPR(31,323,216), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5175 arch/powerpc/xmon/ppc-opc.c {"mfdmact3", XSPR(31,323,217), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5176 arch/powerpc/xmon/ppc-opc.c {"mfdmada3", XSPR(31,323,218), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5177 arch/powerpc/xmon/ppc-opc.c {"mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5178 arch/powerpc/xmon/ppc-opc.c {"mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5179 arch/powerpc/xmon/ppc-opc.c {"mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5180 arch/powerpc/xmon/ppc-opc.c {"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}}, PPC403 5347 arch/powerpc/xmon/ppc-opc.c {"mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5348 arch/powerpc/xmon/ppc-opc.c {"mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5357 arch/powerpc/xmon/ppc-opc.c {"mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5358 arch/powerpc/xmon/ppc-opc.c {"mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5367 arch/powerpc/xmon/ppc-opc.c {"mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, 0, {RT}}, PPC403 5368 arch/powerpc/xmon/ppc-opc.c {"mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5369 arch/powerpc/xmon/ppc-opc.c {"mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5370 arch/powerpc/xmon/ppc-opc.c {"mfevpr", XSPR(31,339,982), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5371 arch/powerpc/xmon/ppc-opc.c {"mfcdbcr", XSPR(31,339,983), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5372 arch/powerpc/xmon/ppc-opc.c {"mftsr", XSPR(31,339,984), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5373 arch/powerpc/xmon/ppc-opc.c {"mftcr", XSPR(31,339,986), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5374 arch/powerpc/xmon/ppc-opc.c {"mfpit", XSPR(31,339,987), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5375 arch/powerpc/xmon/ppc-opc.c {"mftbhi", XSPR(31,339,988), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5376 arch/powerpc/xmon/ppc-opc.c {"mftblo", XSPR(31,339,989), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5377 arch/powerpc/xmon/ppc-opc.c {"mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5378 arch/powerpc/xmon/ppc-opc.c {"mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5379 arch/powerpc/xmon/ppc-opc.c {"mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5382 arch/powerpc/xmon/ppc-opc.c {"mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5383 arch/powerpc/xmon/ppc-opc.c {"mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5384 arch/powerpc/xmon/ppc-opc.c {"mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5385 arch/powerpc/xmon/ppc-opc.c {"mfdac2", XSPR(31,339,1015), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5387 arch/powerpc/xmon/ppc-opc.c {"mfdccr", XSPR(31,339,1018), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5388 arch/powerpc/xmon/ppc-opc.c {"mficcr", XSPR(31,339,1019), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5390 arch/powerpc/xmon/ppc-opc.c {"mfpbl1", XSPR(31,339,1020), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5392 arch/powerpc/xmon/ppc-opc.c {"mfpbu1", XSPR(31,339,1021), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5394 arch/powerpc/xmon/ppc-opc.c {"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5396 arch/powerpc/xmon/ppc-opc.c {"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, 0, {RT}}, PPC403 5500 arch/powerpc/xmon/ppc-opc.c {"mtexisr", XSPR(31,451, 64), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5501 arch/powerpc/xmon/ppc-opc.c {"mtexier", XSPR(31,451, 66), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5502 arch/powerpc/xmon/ppc-opc.c {"mtbr0", XSPR(31,451,128), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5503 arch/powerpc/xmon/ppc-opc.c {"mtbr1", XSPR(31,451,129), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5504 arch/powerpc/xmon/ppc-opc.c {"mtbr2", XSPR(31,451,130), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5505 arch/powerpc/xmon/ppc-opc.c {"mtbr3", XSPR(31,451,131), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5506 arch/powerpc/xmon/ppc-opc.c {"mtbr4", XSPR(31,451,132), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5507 arch/powerpc/xmon/ppc-opc.c {"mtbr5", XSPR(31,451,133), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5508 arch/powerpc/xmon/ppc-opc.c {"mtbr6", XSPR(31,451,134), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5509 arch/powerpc/xmon/ppc-opc.c {"mtbr7", XSPR(31,451,135), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5510 arch/powerpc/xmon/ppc-opc.c {"mtbear", XSPR(31,451,144), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5511 arch/powerpc/xmon/ppc-opc.c {"mtbesr", XSPR(31,451,145), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5512 arch/powerpc/xmon/ppc-opc.c {"mtiocr", XSPR(31,451,160), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5513 arch/powerpc/xmon/ppc-opc.c {"mtdmacr0", XSPR(31,451,192), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5514 arch/powerpc/xmon/ppc-opc.c {"mtdmact0", XSPR(31,451,193), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5515 arch/powerpc/xmon/ppc-opc.c {"mtdmada0", XSPR(31,451,194), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5516 arch/powerpc/xmon/ppc-opc.c {"mtdmasa0", XSPR(31,451,195), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5517 arch/powerpc/xmon/ppc-opc.c {"mtdmacc0", XSPR(31,451,196), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5518 arch/powerpc/xmon/ppc-opc.c {"mtdmacr1", XSPR(31,451,200), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5519 arch/powerpc/xmon/ppc-opc.c {"mtdmact1", XSPR(31,451,201), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5520 arch/powerpc/xmon/ppc-opc.c {"mtdmada1", XSPR(31,451,202), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5521 arch/powerpc/xmon/ppc-opc.c {"mtdmasa1", XSPR(31,451,203), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5522 arch/powerpc/xmon/ppc-opc.c {"mtdmacc1", XSPR(31,451,204), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5523 arch/powerpc/xmon/ppc-opc.c {"mtdmacr2", XSPR(31,451,208), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5524 arch/powerpc/xmon/ppc-opc.c {"mtdmact2", XSPR(31,451,209), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5525 arch/powerpc/xmon/ppc-opc.c {"mtdmada2", XSPR(31,451,210), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5526 arch/powerpc/xmon/ppc-opc.c {"mtdmasa2", XSPR(31,451,211), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5527 arch/powerpc/xmon/ppc-opc.c {"mtdmacc2", XSPR(31,451,212), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5528 arch/powerpc/xmon/ppc-opc.c {"mtdmacr3", XSPR(31,451,216), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5529 arch/powerpc/xmon/ppc-opc.c {"mtdmact3", XSPR(31,451,217), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5530 arch/powerpc/xmon/ppc-opc.c {"mtdmada3", XSPR(31,451,218), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5531 arch/powerpc/xmon/ppc-opc.c {"mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5532 arch/powerpc/xmon/ppc-opc.c {"mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5533 arch/powerpc/xmon/ppc-opc.c {"mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5534 arch/powerpc/xmon/ppc-opc.c {"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}}, PPC403 5539 arch/powerpc/xmon/ppc-opc.c {"dccci", X(31,454), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}}, PPC403 5667 arch/powerpc/xmon/ppc-opc.c {"mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5668 arch/powerpc/xmon/ppc-opc.c {"mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5677 arch/powerpc/xmon/ppc-opc.c {"mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5678 arch/powerpc/xmon/ppc-opc.c {"mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5687 arch/powerpc/xmon/ppc-opc.c {"mticdbdr", XSPR(31,467,979), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5688 arch/powerpc/xmon/ppc-opc.c {"mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5689 arch/powerpc/xmon/ppc-opc.c {"mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5690 arch/powerpc/xmon/ppc-opc.c {"mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5691 arch/powerpc/xmon/ppc-opc.c {"mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5692 arch/powerpc/xmon/ppc-opc.c {"mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5693 arch/powerpc/xmon/ppc-opc.c {"mttcr", XSPR(31,467,986), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5694 arch/powerpc/xmon/ppc-opc.c {"mtpit", XSPR(31,467,987), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5695 arch/powerpc/xmon/ppc-opc.c {"mttbhi", XSPR(31,467,988), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5696 arch/powerpc/xmon/ppc-opc.c {"mttblo", XSPR(31,467,989), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5697 arch/powerpc/xmon/ppc-opc.c {"mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5698 arch/powerpc/xmon/ppc-opc.c {"mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5699 arch/powerpc/xmon/ppc-opc.c {"mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5702 arch/powerpc/xmon/ppc-opc.c {"mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5703 arch/powerpc/xmon/ppc-opc.c {"mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5704 arch/powerpc/xmon/ppc-opc.c {"mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5705 arch/powerpc/xmon/ppc-opc.c {"mtdac2", XSPR(31,467,1015), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5707 arch/powerpc/xmon/ppc-opc.c {"mtdccr", XSPR(31,467,1018), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5708 arch/powerpc/xmon/ppc-opc.c {"mticcr", XSPR(31,467,1019), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5710 arch/powerpc/xmon/ppc-opc.c {"mtpbl1", XSPR(31,467,1020), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5712 arch/powerpc/xmon/ppc-opc.c {"mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5714 arch/powerpc/xmon/ppc-opc.c {"mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5716 arch/powerpc/xmon/ppc-opc.c {"mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, 0, {RS}}, PPC403 5726 arch/powerpc/xmon/ppc-opc.c {"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA0, RB}}, PPC403 6150 arch/powerpc/xmon/ppc-opc.c {"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}}, PPC403 6151 arch/powerpc/xmon/ppc-opc.c {"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}}, PPC403 6194 arch/powerpc/xmon/ppc-opc.c {"tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, PPCA2, {RT, RA}}, PPC403 6195 arch/powerpc/xmon/ppc-opc.c {"tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, PPCA2, {RT, RA}}, PPC403 6196 arch/powerpc/xmon/ppc-opc.c {"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}}, PPC403 6213 arch/powerpc/xmon/ppc-opc.c {"iccci", X(31,966), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}}, PPC403 6225 arch/powerpc/xmon/ppc-opc.c {"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}}, PPC403 6226 arch/powerpc/xmon/ppc-opc.c {"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, 0, {RT, RA}}, PPC403 6227 arch/powerpc/xmon/ppc-opc.c {"tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, 0, {RT, RA}}, PPC403 6228 arch/powerpc/xmon/ppc-opc.c {"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}}, PPC403 6245 arch/powerpc/xmon/ppc-opc.c {"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA0, RB}},