PORT_TC4         1360 drivers/gpu/drm/i915/i915_irq.c 		return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
PORT_TC4         1376 drivers/gpu/drm/i915/i915_irq.c 		return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
PORT_TC4         1424 drivers/gpu/drm/i915/i915_irq.c 		return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
PORT_TC4         1454 drivers/gpu/drm/i915/i915_irq.c 		return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
PORT_TC4         3480 drivers/gpu/drm/i915/i915_irq.c 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
PORT_TC4         3487 drivers/gpu/drm/i915/i915_irq.c 		   GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
PORT_TC4         8058 drivers/gpu/drm/i915/i915_reg.h #define ICP_TC_HPD_ENABLE_MASK		(ICP_TC_HPD_ENABLE(PORT_TC4) | \
PORT_TC4         9745 drivers/gpu/drm/i915/i915_reg.h #define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 << ((tc_port) < PORT_TC4 ? \
PORT_TC4         9747 drivers/gpu/drm/i915/i915_reg.h 						       (tc_port) - PORT_TC4 + 21))