PORT_HOTPLUG_STAT  438 drivers/gpu/drm/gma500/cdv_device.c 	REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT  451 drivers/gpu/drm/gma500/cdv_device.c 		REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT  169 drivers/gpu/drm/gma500/cdv_intel_crt.c 	if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
PORT_HOTPLUG_STAT  174 drivers/gpu/drm/gma500/cdv_intel_crt.c 	REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
PORT_HOTPLUG_STAT  286 drivers/gpu/drm/gma500/psb_irq.c 		REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT  556 drivers/gpu/drm/i915/display/intel_crt.c 	stat = I915_READ(PORT_HOTPLUG_STAT);
PORT_HOTPLUG_STAT  561 drivers/gpu/drm/i915/display/intel_crt.c 	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
PORT_HOTPLUG_STAT 5136 drivers/gpu/drm/i915/display/intel_dp.c 	return I915_READ(PORT_HOTPLUG_STAT) & bit;
PORT_HOTPLUG_STAT 5159 drivers/gpu/drm/i915/display/intel_dp.c 	return I915_READ(PORT_HOTPLUG_STAT) & bit;
PORT_HOTPLUG_STAT 1891 drivers/gpu/drm/i915/i915_irq.c 		u32 tmp = I915_READ(PORT_HOTPLUG_STAT) & hotplug_status_mask;
PORT_HOTPLUG_STAT 1897 drivers/gpu/drm/i915/i915_irq.c 		I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
PORT_HOTPLUG_STAT 1902 drivers/gpu/drm/i915/i915_irq.c 		  I915_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT 3174 drivers/gpu/drm/i915/i915_irq.c 	intel_uncore_write(uncore, PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT 4063 drivers/gpu/drm/i915/i915_irq.c 		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
PORT_HOTPLUG_STAT 4170 drivers/gpu/drm/i915/i915_irq.c 	I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));