PORT_E           1400 drivers/gpu/drm/i915/display/intel_bios.c 		[PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
PORT_E           1471 drivers/gpu/drm/i915/display/intel_bios.c 	if (is_crt && port != PORT_E)
PORT_E           1476 drivers/gpu/drm/i915/display/intel_bios.c 	if (is_dvi && (port == PORT_A || port == PORT_E))
PORT_E           1481 drivers/gpu/drm/i915/display/intel_bios.c 	if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
PORT_E           1750 drivers/gpu/drm/i915/display/intel_bios.c 		info->supports_dvi = (port != PORT_A && port != PORT_E);
PORT_E           1752 drivers/gpu/drm/i915/display/intel_bios.c 		info->supports_dp = (port != PORT_E);
PORT_E           2029 drivers/gpu/drm/i915/display/intel_bios.c 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
PORT_E           2077 drivers/gpu/drm/i915/display/intel_bios.c 		[PORT_E] = DVO_PORT_DPE,
PORT_E           2113 drivers/gpu/drm/i915/display/intel_bios.c 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
PORT_E           1025 drivers/gpu/drm/i915/display/intel_crt.c 		crt->base.port = PORT_E;
PORT_E            671 drivers/gpu/drm/i915/display/intel_ddi.c 	if (port == PORT_A || port == PORT_E)
PORT_E           1103 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(PORT_CLK_SEL(PORT_E), ddi_pll_sel);
PORT_E           1110 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(DP_TP_CTL(PORT_E),
PORT_E           1120 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(DDI_BUF_CTL(PORT_E),
PORT_E           1124 drivers/gpu/drm/i915/display/intel_ddi.c 		POSTING_READ(DDI_BUF_CTL(PORT_E));
PORT_E           1148 drivers/gpu/drm/i915/display/intel_ddi.c 		temp = I915_READ(DP_TP_STATUS(PORT_E));
PORT_E           1167 drivers/gpu/drm/i915/display/intel_ddi.c 		temp = I915_READ(DDI_BUF_CTL(PORT_E));
PORT_E           1169 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(DDI_BUF_CTL(PORT_E), temp);
PORT_E           1170 drivers/gpu/drm/i915/display/intel_ddi.c 		POSTING_READ(DDI_BUF_CTL(PORT_E));
PORT_E           1173 drivers/gpu/drm/i915/display/intel_ddi.c 		temp = I915_READ(DP_TP_CTL(PORT_E));
PORT_E           1176 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(DP_TP_CTL(PORT_E), temp);
PORT_E           1177 drivers/gpu/drm/i915/display/intel_ddi.c 		POSTING_READ(DP_TP_CTL(PORT_E));
PORT_E           1179 drivers/gpu/drm/i915/display/intel_ddi.c 		intel_wait_ddi_buf_idle(dev_priv, PORT_E);
PORT_E           1190 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(DP_TP_CTL(PORT_E),
PORT_E           2238 drivers/gpu/drm/i915/display/intel_ddi.c 		_skl_ddi_set_iboost(dev_priv, PORT_E, iboost);
PORT_E           3179 drivers/gpu/drm/i915/display/intel_ddi.c 	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
PORT_E           3498 drivers/gpu/drm/i915/display/intel_ddi.c 		[PORT_E] = CHICKEN_TRANS_A,
PORT_E           3503 drivers/gpu/drm/i915/display/intel_ddi.c 	if (WARN_ON(port < PORT_A || port > PORT_E))
PORT_E           3537 drivers/gpu/drm/i915/display/intel_ddi.c 		if (port == PORT_E)
PORT_E           3549 drivers/gpu/drm/i915/display/intel_ddi.c 		if (port == PORT_E)
PORT_E           4237 drivers/gpu/drm/i915/display/intel_ddi.c 	    !intel_bios_is_port_present(dev_priv, PORT_E))
PORT_E           4253 drivers/gpu/drm/i915/display/intel_ddi.c 	if (port == PORT_A || port == PORT_E) {
PORT_E           4375 drivers/gpu/drm/i915/display/intel_ddi.c 	case PORT_E:
PORT_E           6736 drivers/gpu/drm/i915/display/intel_display.c 	case PORT_E:
PORT_E           10389 drivers/gpu/drm/i915/display/intel_display.c 	    (port == PORT_E) && I915_READ(LPT_TRANSCONF) & TRANS_ENABLE) {
PORT_E           15341 drivers/gpu/drm/i915/display/intel_display.c 		intel_ddi_init(dev_priv, PORT_E);
PORT_E           15395 drivers/gpu/drm/i915/display/intel_display.c 		    intel_bios_is_port_present(dev_priv, PORT_E))
PORT_E           15396 drivers/gpu/drm/i915/display/intel_display.c 			intel_ddi_init(dev_priv, PORT_E);
PORT_E            200 drivers/gpu/drm/i915/display/intel_display.h 	case PORT_E:
PORT_E            667 drivers/gpu/drm/i915/display/intel_dp_mst.c 	if (INTEL_GEN(i915) < 11 && port == PORT_E)
PORT_E            268 drivers/gpu/drm/i915/display/intel_hdcp.c 	case PORT_E:
PORT_E            890 drivers/gpu/drm/i915/display/intel_hdcp.c 	return INTEL_GEN(dev_priv) >= 9 && port < PORT_E;
PORT_E            101 drivers/gpu/drm/i915/display/intel_hotplug.c 	case PORT_E:
PORT_E            381 drivers/gpu/drm/i915/display/intel_opregion.c 	if (port == PORT_E)  {
PORT_E            318 drivers/gpu/drm/i915/gvt/display.c 			intel_vgpu_has_monitor_on_port(vgpu, PORT_E)) {
PORT_E             92 drivers/gpu/drm/i915/gvt/edid.c 		port = PORT_E;
PORT_E            116 drivers/gpu/drm/i915/gvt/edid.c 		port = PORT_E;
PORT_E            545 drivers/gpu/drm/i915/gvt/handlers.c 		if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E)))
PORT_E            546 drivers/gpu/drm/i915/gvt/handlers.c 			vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E))
PORT_E            564 drivers/gpu/drm/i915/gvt/handlers.c 	u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E));
PORT_E            566 drivers/gpu/drm/i915/gvt/handlers.c 	u32 tx_ctl = vgpu_vreg_t(vgpu, DP_TP_CTL(PORT_E));
PORT_E            679 drivers/gpu/drm/i915/gvt/handlers.c 			vgpu_vreg_t(vgpu, DP_TP_STATUS(PORT_E)) |=
PORT_E            685 drivers/gpu/drm/i915/gvt/handlers.c 	calc_index(offset, _DP_TP_CTL_A, _DP_TP_CTL_B, 0, DP_TP_CTL(PORT_E))
PORT_E           2410 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PORT_CLK_SEL(PORT_E), D_ALL);
PORT_E           2451 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write);
PORT_E           2457 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(DP_TP_CTL(PORT_E), D_ALL, NULL, dp_tp_ctl_mmio_write);
PORT_E           2463 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(DP_TP_STATUS(PORT_E), D_ALL, NULL, NULL);