PORT0_BASE         55 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORT0_REG(reg_addr) (PORT0_BASE + (reg_addr))
PORT0_BASE         58 drivers/net/ethernet/chelsio/cxgb4/t4_regs.h #define PORT_BASE(idx) (PORT0_BASE + (idx) * PORT_STRIDE)