PORT 65 arch/mips/alchemy/common/platform.c PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT), PORT 66 arch/mips/alchemy/common/platform.c PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT), PORT 67 arch/mips/alchemy/common/platform.c PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT), PORT 68 arch/mips/alchemy/common/platform.c PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT), PORT 71 arch/mips/alchemy/common/platform.c PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT), PORT 72 arch/mips/alchemy/common/platform.c PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT), PORT 75 arch/mips/alchemy/common/platform.c PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT), PORT 76 arch/mips/alchemy/common/platform.c PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT), PORT 77 arch/mips/alchemy/common/platform.c PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT), PORT 80 arch/mips/alchemy/common/platform.c PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT), PORT 81 arch/mips/alchemy/common/platform.c PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT), PORT 82 arch/mips/alchemy/common/platform.c PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT), PORT 85 arch/mips/alchemy/common/platform.c PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT), PORT 86 arch/mips/alchemy/common/platform.c PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT), PORT 89 arch/mips/alchemy/common/platform.c PORT(AU1300_UART0_PHYS_ADDR, AU1300_UART0_INT), PORT 90 arch/mips/alchemy/common/platform.c PORT(AU1300_UART1_PHYS_ADDR, AU1300_UART1_INT), PORT 91 arch/mips/alchemy/common/platform.c PORT(AU1300_UART2_PHYS_ADDR, AU1300_UART2_INT), PORT 92 arch/mips/alchemy/common/platform.c PORT(AU1300_UART3_PHYS_ADDR, AU1300_UART3_INT), PORT 243 arch/mips/ar7/prom.c return readl((void *)PORT(offset)); PORT 248 arch/mips/ar7/prom.c writel(value, (void *)PORT(offset)); PORT 42 arch/mips/boot/compressed/uart-16550.c #ifndef PORT PORT 48 arch/mips/boot/compressed/uart-16550.c return *((volatile IOTYPE *)PORT(offset)) & 0xFF; PORT 53 arch/mips/boot/compressed/uart-16550.c *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; PORT 22 arch/mips/kernel/8250-platform.c PORT(0x3F8, 4), PORT 23 arch/mips/kernel/8250-platform.c PORT(0x2F8, 3), PORT 24 arch/mips/kernel/8250-platform.c PORT(0x3E8, 4), PORT 25 arch/mips/kernel/8250-platform.c PORT(0x2E8, 3), PORT 17 arch/mips/loongson64/common/early_printk.c return readb(PORT(base, offset)); PORT 22 arch/mips/loongson64/common/early_printk.c writeb(value, PORT(base, offset)); PORT 43 arch/mips/loongson64/common/serial.c [MACH_LEMOTE_FL2E] = {PORT(4, 1843200), {} }, PORT 44 arch/mips/loongson64/common/serial.c [MACH_LEMOTE_FL2F] = {PORT(3, 1843200), {} }, PORT 49 arch/mips/loongson64/common/serial.c [MACH_LEMOTE_LL2F] = {PORT(3, 1843200), {} }, PORT 74 arch/mips/netlogic/xlr/platform.c PORT(PIC_UART_0_IRQ), PORT 75 arch/mips/netlogic/xlr/platform.c PORT(PIC_UART_1_IRQ), PORT 30 arch/mips/sni/a20r.c PORT(0x3f8, 4), PORT 31 arch/mips/sni/a20r.c PORT(0x2f8, 3), PORT 80 arch/mips/sni/pcimt.c PORT(0x3f8, 4), PORT 81 arch/mips/sni/pcimt.c PORT(0x2f8, 3), PORT 32 arch/mips/sni/pcit.c PORT(0x3f8, 0), PORT 33 arch/mips/sni/pcit.c PORT(0x2f8, 3), PORT 46 arch/mips/sni/pcit.c PORT(0x3f8, 0), PORT 47 arch/mips/sni/pcit.c PORT(0x2f8, 3), PORT 48 arch/mips/sni/pcit.c PORT(0x3e8, 4), PORT 49 arch/mips/sni/pcit.c PORT(0x2e8, 3), PORT 279 drivers/ata/sata_nv.c #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT))))) PORT 187 drivers/crypto/chelsio/chtls/chtls_io.c FLOWC_PARAM(PORT, csk->tx_chan); PORT 130 drivers/media/radio/radio-gemtek.c #define BU2614_PORT_MASK MKMASK(PORT) PORT 159 drivers/net/ethernet/amd/ni65.c #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \ PORT 160 drivers/net/ethernet/amd/ni65.c outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);} PORT 161 drivers/net/ethernet/amd/ni65.c #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\ PORT 162 drivers/net/ethernet/amd/ni65.c inw(PORT+L_DATAREG)) PORT 164 drivers/net/ethernet/amd/ni65.c #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);} PORT 169 drivers/net/ethernet/amd/ni65.c #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);} PORT 170 drivers/net/ethernet/amd/ni65.c #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG)) PORT 278 drivers/net/ethernet/amd/ni65.c outw(80,PORT+L_ADDRREG); PORT 279 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_ADDRREG) != 80) PORT 283 drivers/net/ethernet/amd/ni65.c outw(0,PORT+L_ADDRREG); PORT 284 drivers/net/ethernet/amd/ni65.c outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */ PORT 285 drivers/net/ethernet/amd/ni65.c outw(1,PORT+L_ADDRREG); PORT 286 drivers/net/ethernet/amd/ni65.c outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */ PORT 288 drivers/net/ethernet/amd/ni65.c outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */ PORT 326 drivers/net/ethernet/amd/ni65.c outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */ PORT 460 drivers/net/ethernet/amd/ni65.c outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */ PORT 469 drivers/net/ethernet/amd/ni65.c outw(88,PORT+L_ADDRREG); PORT 470 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_ADDRREG) == 88) { PORT 472 drivers/net/ethernet/amd/ni65.c v = inw(PORT+L_DATAREG); PORT 474 drivers/net/ethernet/amd/ni65.c outw(89,PORT+L_ADDRREG); PORT 475 drivers/net/ethernet/amd/ni65.c v |= inw(PORT+L_DATAREG); PORT 595 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) ) PORT 804 drivers/net/ethernet/amd/ni65.c outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */ PORT 855 drivers/net/ethernet/amd/ni65.c if(inw(PORT+L_DATAREG) & CSR0_IDON) { PORT 861 drivers/net/ethernet/amd/ni65.c printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG)); PORT 883 drivers/net/ethernet/amd/ni65.c csr0 = inw(PORT+L_DATAREG); PORT 1067 drivers/net/ethernet/amd/ni65.c dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) ); PORT 441 drivers/net/ethernet/qlogic/qed/qed_hw.c port_id = (QED_DMAE_FLAGS_IS_SET(p_params, PORT)) ? PORT 1026 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c #define QLC_83XX_VXLAN_UDP_DPORT(PORT) ((PORT & 0xffff) << 16) PORT 1170 drivers/net/ethernet/sun/niu.h #define ENET_VLAN_TBL_SHIFT(PORT) ((PORT) * 4) PORT 1948 drivers/net/ethernet/sun/niu.h #define ZCP_RAM_SEL_CFIFO(PORT) (0x10 + (PORT)) PORT 1958 drivers/net/ethernet/sun/niu.h #define RESET_CFIFO_RST(PORT) (0x1 << (PORT)) PORT 1960 drivers/net/ethernet/sun/niu.h #define CFIFO_ECC(PORT) (FZC_ZCP + 0x000a0UL + (PORT) * 8UL) PORT 2277 drivers/net/ethernet/sun/niu.h #define TXC_PORT_CTL(PORT) (FZC_TXC + 0x20020UL + (PORT)*0x100UL) PORT 2280 drivers/net/ethernet/sun/niu.h #define TXC_PKT_STUFFED(PORT) (FZC_TXC + 0x20030UL + (PORT)*0x100UL) PORT 2284 drivers/net/ethernet/sun/niu.h #define TXC_PKT_XMIT(PORT) (FZC_TXC + 0x20038UL + (PORT)*0x100UL) PORT 2288 drivers/net/ethernet/sun/niu.h #define TXC_ROECC_CTL(PORT) (FZC_TXC + 0x20040UL + (PORT)*0x100UL) PORT 2299 drivers/net/ethernet/sun/niu.h #define TXC_ROECC_ST(PORT) (FZC_TXC + 0x20048UL + (PORT)*0x100UL) PORT 2305 drivers/net/ethernet/sun/niu.h #define TXC_RO_DATA0(PORT) (FZC_TXC + 0x20050UL + (PORT)*0x100UL) PORT 2308 drivers/net/ethernet/sun/niu.h #define TXC_RO_DATA1(PORT) (FZC_TXC + 0x20058UL + (PORT)*0x100UL) PORT 2311 drivers/net/ethernet/sun/niu.h #define TXC_RO_DATA2(PORT) (FZC_TXC + 0x20060UL + (PORT)*0x100UL) PORT 2314 drivers/net/ethernet/sun/niu.h #define TXC_RO_DATA3(PORT) (FZC_TXC + 0x20068UL + (PORT)*0x100UL) PORT 2317 drivers/net/ethernet/sun/niu.h #define TXC_RO_DATA4(PORT) (FZC_TXC + 0x20070UL + (PORT)*0x100UL) PORT 2320 drivers/net/ethernet/sun/niu.h #define TXC_SFECC_CTL(PORT) (FZC_TXC + 0x20078UL + (PORT)*0x100UL) PORT 2331 drivers/net/ethernet/sun/niu.h #define TXC_SFECC_ST(PORT) (FZC_TXC + 0x20080UL + (PORT)*0x100UL) PORT 2337 drivers/net/ethernet/sun/niu.h #define TXC_SF_DATA0(PORT) (FZC_TXC + 0x20088UL + (PORT)*0x100UL) PORT 2340 drivers/net/ethernet/sun/niu.h #define TXC_SF_DATA1(PORT) (FZC_TXC + 0x20090UL + (PORT)*0x100UL) PORT 2343 drivers/net/ethernet/sun/niu.h #define TXC_SF_DATA2(PORT) (FZC_TXC + 0x20098UL + (PORT)*0x100UL) PORT 2346 drivers/net/ethernet/sun/niu.h #define TXC_SF_DATA3(PORT) (FZC_TXC + 0x200a0UL + (PORT)*0x100UL) PORT 2349 drivers/net/ethernet/sun/niu.h #define TXC_SF_DATA4(PORT) (FZC_TXC + 0x200a8UL + (PORT)*0x100UL) PORT 2352 drivers/net/ethernet/sun/niu.h #define TXC_RO_TIDS(PORT) (FZC_TXC + 0x200b0UL + (PORT)*0x100UL) PORT 2355 drivers/net/ethernet/sun/niu.h #define TXC_RO_STATE0(PORT) (FZC_TXC + 0x200b8UL + (PORT)*0x100UL) PORT 2358 drivers/net/ethernet/sun/niu.h #define TXC_RO_STATE1(PORT) (FZC_TXC + 0x200c0UL + (PORT)*0x100UL) PORT 2361 drivers/net/ethernet/sun/niu.h #define TXC_RO_STATE2(PORT) (FZC_TXC + 0x200c8UL + (PORT)*0x100UL) PORT 2364 drivers/net/ethernet/sun/niu.h #define TXC_RO_STATE3(PORT) (FZC_TXC + 0x200d0UL + (PORT)*0x100UL) PORT 2372 drivers/net/ethernet/sun/niu.h #define TXC_RO_CTL(PORT) (FZC_TXC + 0x200d8UL + (PORT)*0x100UL) PORT 2387 drivers/net/ethernet/sun/niu.h #define TXC_RO_ST_DATA0(PORT) (FZC_TXC + 0x200e0UL + (PORT)*0x100UL) PORT 2390 drivers/net/ethernet/sun/niu.h #define TXC_RO_ST_DATA1(PORT) (FZC_TXC + 0x200e8UL + (PORT)*0x100UL) PORT 2393 drivers/net/ethernet/sun/niu.h #define TXC_RO_ST_DATA2(PORT) (FZC_TXC + 0x200f0UL + (PORT)*0x100UL) PORT 2396 drivers/net/ethernet/sun/niu.h #define TXC_RO_ST_DATA3(PORT) (FZC_TXC + 0x200f8UL + (PORT)*0x100UL) PORT 2399 drivers/net/ethernet/sun/niu.h #define TXC_PORT_PACKET_REQ(PORT) (FZC_TXC + 0x20100UL + (PORT)*0x100UL) PORT 2408 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_VAL_SHIFT(PORT) ((PORT) * 8) PORT 2409 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_VAL(PORT) (0x3f << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2410 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_SF_CE(PORT) (0x01 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2411 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_SF_UE(PORT) (0x02 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2412 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_RO_CE(PORT) (0x04 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2413 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_RO_UE(PORT) (0x08 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2414 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_REORDER_ERR(PORT) (0x10 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2415 drivers/net/ethernet/sun/niu.h #define TXC_INT_STAT_PKTASM_DEAD(PORT) (0x20 << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2418 drivers/net/ethernet/sun/niu.h #define TXC_INT_MASK_VAL_SHIFT(PORT) ((PORT) * 8) PORT 2419 drivers/net/ethernet/sun/niu.h #define TXC_INT_MASK_VAL(PORT) (0x3f << TXC_INT_STAT_VAL_SHIFT(PORT)) PORT 2539 drivers/net/ethernet/sun/niu.h #define LDN_MAC(PORT) (64 + (PORT)) PORT 246 drivers/pinctrl/pinctrl-falcon.c void __iomem *mem = info->membase[PORT(pin)]; PORT 283 drivers/pinctrl/pinctrl-falcon.c void __iomem *mem = info->membase[PORT(pin)]; PORT 328 drivers/pinctrl/pinctrl-falcon.c int port = PORT(offset); PORT 381 drivers/pinctrl/pinctrl-falcon.c int port = PORT(info->mfp[mfp].pin); PORT 36 drivers/pinctrl/pinctrl-tb10x.c #define PCFG_PORT_MASK(PORT) \ PORT 37 drivers/pinctrl/pinctrl-tb10x.c (((1 << PCFG_PORT_BITWIDTH) - 1) << (PCFG_PORT_BITWIDTH * (PORT))) PORT 400 drivers/pinctrl/pinctrl-tb10x.c #define DEFPINFUNCGRP(NAME, PORT, MODE, ISGPIO) { \ PORT 403 drivers/pinctrl/pinctrl-tb10x.c .port = (PORT), .mode = (MODE), \ PORT 42 drivers/pinctrl/pinctrl-xway.c #define GPIO_BASE(p) (REG_OFF * PORT(p)) PORT 1339 drivers/pinctrl/pinctrl-xway.c int port = PORT(pin); PORT 1392 drivers/pinctrl/pinctrl-xway.c int port = PORT(pin); PORT 1500 drivers/pinctrl/pinctrl-xway.c int port = PORT(pin); PORT 1563 drivers/pinctrl/pinctrl-xway.c if (PORT(pin) == PORT3) PORT 254 drivers/pinctrl/sh-pfc/pfc-emev2.c #define __PORT_DATA(pn, pfx, sfx) PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN) PORT 651 drivers/pinctrl/sh-pfc/sh_pfc.h #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) PORT 665 drivers/pinctrl/sh-pfc/sh_pfc.h .name = __stringify(PORT##_pin), \ PORT 666 drivers/pinctrl/sh-pfc/sh_pfc.h .enum_id = PORT##_pin##_DATA, \ PORT 674 drivers/pinctrl/sh-pfc/sh_pfc.h PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0, \ PORT 675 drivers/pinctrl/sh-pfc/sh_pfc.h PORT##pfx##_OUT, PORT##pfx##_IN) PORT 692 drivers/pinctrl/sh-pfc/sh_pfc.h CPU_ALL_PORT(_PORT_ENTRY, PORT, unused), \ PORT 736 drivers/pinctrl/sh-pfc/sh_pfc.h 0, PORT##nr##_OUT, PORT##nr##_IN, 0, \ PORT 740 drivers/pinctrl/sh-pfc/sh_pfc.h PORT##nr##_FN0, PORT##nr##_FN1, \ PORT 741 drivers/pinctrl/sh-pfc/sh_pfc.h PORT##nr##_FN2, PORT##nr##_FN3, \ PORT 742 drivers/pinctrl/sh-pfc/sh_pfc.h PORT##nr##_FN4, PORT##nr##_FN5, \ PORT 743 drivers/pinctrl/sh-pfc/sh_pfc.h PORT##nr##_FN6, PORT##nr##_FN7 \ PORT 289 drivers/scsi/aha152x.h #define SETPORT(PORT, VAL) outb( (VAL), (PORT) ) PORT 290 drivers/scsi/aha152x.h #define GETPORT(PORT) inb( PORT ) PORT 291 drivers/scsi/aha152x.h #define SETBITS(PORT, BITS) outb( (inb(PORT) | (BITS)), (PORT) ) PORT 292 drivers/scsi/aha152x.h #define CLRBITS(PORT, BITS) outb( (inb(PORT) & ~(BITS)), (PORT) ) PORT 293 drivers/scsi/aha152x.h #define TESTHI(PORT, BITS) ((inb(PORT) & (BITS)) == (BITS)) PORT 294 drivers/scsi/aha152x.h #define TESTLO(PORT, BITS) ((inb(PORT) & (BITS)) == 0) PORT 17 drivers/scsi/bfa/bfa_fcs_lport.c BFA_TRC_FILE(FCS, PORT); PORT 18 drivers/scsi/bfa/bfa_port.c BFA_TRC_FILE(CNA, PORT); PORT 91 drivers/tty/serial/ip22zilog.c #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel *)((PORT)->membase)) PORT 92 drivers/tty/serial/ip22zilog.c #define UART_ZILOG(PORT) ((struct uart_ip22zilog_port *)(PORT)) PORT 93 drivers/tty/serial/ip22zilog.c #define IP22ZILOG_GET_CURR_REG(PORT, REGNUM) \ PORT 94 drivers/tty/serial/ip22zilog.c (UART_ZILOG(PORT)->curregs[REGNUM]) PORT 95 drivers/tty/serial/ip22zilog.c #define IP22ZILOG_SET_CURR_REG(PORT, REGNUM, REGVAL) \ PORT 96 drivers/tty/serial/ip22zilog.c ((UART_ZILOG(PORT)->curregs[REGNUM]) = (REGVAL)) PORT 109 drivers/tty/serial/sunzilog.c #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) PORT 110 drivers/tty/serial/sunzilog.c #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) PORT 225 samples/bpf/cookie_uid_helper_example.c si_other.sin_port = htons(PORT); PORT 33 tools/testing/selftests/net/reuseaddr_conflict.c .sin6_port = htons(PORT), PORT 38 tools/testing/selftests/net/reuseaddr_conflict.c .sin_port = htons(PORT), PORT 91 tools/testing/selftests/net/reuseaddr_conflict.c fprintf(stderr, "Opening 127.0.0.1:%d\n", PORT); PORT 95 tools/testing/selftests/net/reuseaddr_conflict.c fprintf(stderr, "Opening INADDR_ANY:%d\n", PORT); PORT 99 tools/testing/selftests/net/reuseaddr_conflict.c fprintf(stderr, "Opening in6addr_any:%d\n", PORT); PORT 103 tools/testing/selftests/net/reuseaddr_conflict.c fprintf(stderr, "Opening INADDR_ANY:%d\n", PORT); PORT 108 tools/testing/selftests/net/reuseaddr_conflict.c fprintf(stderr, "Opening INADDR_ANY:%d after closing ipv6 socket\n", PORT); PORT 32 tools/testing/selftests/net/reuseport_addr_any.c static const int PORT = 8888; PORT 51 tools/testing/selftests/net/reuseport_addr_any.c addr4.sin_port = htons(PORT); PORT 61 tools/testing/selftests/net/reuseport_addr_any.c addr6.sin6_port = htons(PORT); PORT 119 tools/testing/selftests/net/reuseport_addr_any.c daddr4.sin_port = htons(PORT); PORT 132 tools/testing/selftests/net/reuseport_addr_any.c daddr6.sin6_port = htons(PORT); PORT 32 tools/testing/selftests/net/reuseport_bpf_cpu.c static const int PORT = 8888; PORT 47 tools/testing/selftests/net/reuseport_bpf_cpu.c addr4->sin_port = htons(PORT); PORT 53 tools/testing/selftests/net/reuseport_bpf_cpu.c addr6->sin6_port = htons(PORT); PORT 112 tools/testing/selftests/net/reuseport_bpf_cpu.c daddr4->sin_port = htons(PORT); PORT 123 tools/testing/selftests/net/reuseport_bpf_cpu.c daddr6->sin6_port = htons(PORT); PORT 28 tools/testing/selftests/net/reuseport_bpf_numa.c static const int PORT = 8888; PORT 43 tools/testing/selftests/net/reuseport_bpf_numa.c addr4->sin_port = htons(PORT); PORT 49 tools/testing/selftests/net/reuseport_bpf_numa.c addr6->sin6_port = htons(PORT); PORT 124 tools/testing/selftests/net/reuseport_bpf_numa.c daddr4->sin_port = htons(PORT); PORT 135 tools/testing/selftests/net/reuseport_bpf_numa.c daddr6->sin6_port = htons(PORT); PORT 29 tools/testing/selftests/net/reuseport_dualstack.c static const int PORT = 8888; PORT 43 tools/testing/selftests/net/reuseport_dualstack.c addr4->sin_port = htons(PORT); PORT 49 tools/testing/selftests/net/reuseport_dualstack.c addr6->sin6_port = htons(PORT); PORT 84 tools/testing/selftests/net/reuseport_dualstack.c daddr.sin_port = htons(PORT); PORT 49 tools/testing/selftests/net/tcp_fastopen_backup_key.c static const int PORT = 8891; PORT 104 tools/testing/selftests/net/tcp_fastopen_backup_key.c addr4.sin_port = htons(PORT); PORT 111 tools/testing/selftests/net/tcp_fastopen_backup_key.c addr6.sin6_port = htons(PORT); PORT 162 tools/testing/selftests/net/tcp_fastopen_backup_key.c daddr4.sin_port = htons(PORT); PORT 175 tools/testing/selftests/net/tcp_fastopen_backup_key.c daddr6.sin6_port = htons(PORT);