PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0  370 arch/arm/mach-cns3xxx/core.c 		cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);
PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0   60 arch/arm/mach-cns3xxx/devices.c 	cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);