PM_CLK_CTRL_REG 436 arch/arm/mach-cns3xxx/cns3xxx.h PM_CLK_CTRL_REG &= ~((0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \ PM_CLK_CTRL_REG 437 arch/arm/mach-cns3xxx/cns3xxx.h PM_CLK_CTRL_REG |= (((DIV)&0x3) << PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV); \ PM_CLK_CTRL_REG 441 arch/arm/mach-cns3xxx/cns3xxx.h PM_CLK_CTRL_REG &= ~((0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \ PM_CLK_CTRL_REG 442 arch/arm/mach-cns3xxx/cns3xxx.h PM_CLK_CTRL_REG |= (((CPU)&0xF) << PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL); \ PM_CLK_CTRL_REG 105 arch/arm/mach-cns3xxx/pm.c u32 reg = __raw_readl(PM_CLK_CTRL_REG);