PMX_NFCE2_MASK 198 drivers/pinctrl/spear/pinctrl-spear1310.c #define PMX_NAND_4CHIPS_MASK (PMX_NFCE1_MASK | PMX_NFCE2_MASK | \ PMX_NFCE2_MASK 211 drivers/pinctrl/spear/pinctrl-spear1310.c PMX_NFCE2_MASK) PMX_NFCE2_MASK 757 drivers/pinctrl/spear/pinctrl-spear1310.c .mask = PMX_NFCE2_MASK, PMX_NFCE2_MASK 761 drivers/pinctrl/spear/pinctrl-spear1310.c .mask = PMX_NFCE2_MASK, PMX_NFCE2_MASK 762 drivers/pinctrl/spear/pinctrl-spear1310.c .val = PMX_NFCE2_MASK, PMX_NFCE2_MASK 903 drivers/pinctrl/spear/pinctrl-spear1310.c PMX_NFCE1_MASK | PMX_NFCE2_MASK | PMX_NFWPRT1_MASK | PMX_NFCE2_MASK 2210 drivers/pinctrl/spear/pinctrl-spear1310.c PMX_NFCE2_MASK, PMX_NFCE2_MASK 2216 drivers/pinctrl/spear/pinctrl-spear1310.c PMX_NFCE2_MASK, PMX_NFCE2_MASK 2219 drivers/pinctrl/spear/pinctrl-spear1310.c PMX_NFCE2_MASK, PMX_NFCE2_MASK 2540 drivers/pinctrl/spear/pinctrl-spear1310.c DEFINE_2_MUXREG(pin_grp7, PAD_FUNCTION_EN_1, PAD_DIRECTION_SEL_1, PMX_NFCE2_MASK, 0, 1); PMX_NFCE2_MASK 2544 drivers/pinctrl/spear/pinctrl-spear1310.c DEFINE_2_MUXREG(pin206, PAD_FUNCTION_EN_1, PAD_DIRECTION_SEL_1, PMX_KBD_COL0_MASK | PMX_NFCE2_MASK, 0, 1);